Patents by Inventor Martin McAfee
Martin McAfee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11809260Abstract: A method of operating a multiphase power supply includes identifying a least efficient phase of a plurality of phases in the multiphase power supply based on a comparison of a pulse width for each phase in the plurality of phases, and decreasing an amount of power supplied to a load by the identified least efficient phase.Type: GrantFiled: September 23, 2020Date of Patent: November 7, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Martin McAfee, David L Wigton
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Publication number: 20220091661Abstract: A method of operating a multiphase power supply includes identifying a least efficient phase of a plurality of phases in the multiphase power supply based on a comparison of a pulse width for each phase in the plurality of phases, and decreasing an amount of power supplied to a load by the identified least efficient phase.Type: ApplicationFiled: September 23, 2020Publication date: March 24, 2022Inventors: Martin McAfee, David L. Wigton
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Patent number: 7600157Abstract: An information handling system includes first and second input/output (I/O) controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.Type: GrantFiled: October 14, 2008Date of Patent: October 6, 2009Assignee: Dell Products L.P.Inventors: Martin McAfee, Bharath Vasudevan
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Publication number: 20090037776Abstract: An information handling system includes first and second input/output (I/O) controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.Type: ApplicationFiled: October 14, 2008Publication date: February 5, 2009Applicant: Dell Products L.P.Inventors: Martin McAfee, Bharath Vasudevan
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Patent number: 7480831Abstract: An information handling system includes first and second I/O controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.Type: GrantFiled: January 23, 2003Date of Patent: January 20, 2009Assignee: Dell Products L.P.Inventors: Martin McAfee, Bharath Vasudevan
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Patent number: 7293125Abstract: A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.Type: GrantFiled: August 29, 2006Date of Patent: November 6, 2007Assignee: Dell Products L.P.Inventors: Martin McAfee, Louis N. Castro
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Publication number: 20070073959Abstract: A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.Type: ApplicationFiled: August 29, 2006Publication date: March 29, 2007Applicant: DELL PRODUCTS L.P.Inventors: Martin McAfee, Louis Castro
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Patent number: 7149907Abstract: A method of responding to a thermal trip signal generated by a processor of a system having multiple processor nodes. If a processor overheats beyond a critical temperature, a temperature monitor receives the thermal trip signal, and turns off an enable signal to a voltage control module that control power to the processors. The temperature monitor also triggers a system reset. Upon reset, the temperature monitor ensures that all nodes, other than the node with the overheated processor, return to an operational state.Type: GrantFiled: July 10, 2003Date of Patent: December 12, 2006Assignee: Dell Products L.P.Inventors: Martin McAfee, Kevin L. Miller, Robert L. Nance, Robert S. Tung
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Patent number: 7099969Abstract: A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.Type: GrantFiled: November 6, 2003Date of Patent: August 29, 2006Assignee: Dell Products L.P.Inventors: Martin McAfee, Louis N. Castro
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Publication number: 20050102454Abstract: A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.Type: ApplicationFiled: November 6, 2003Publication date: May 12, 2005Applicant: DELL PRODUCTS L.P.Inventors: Martin McAfee, Louis Castro
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Patent number: 6865693Abstract: A debugging circuit capable of debugging a plurality of possible microprocessors, and a switch for use in the same. The debugging circuit includes a debugging port, a plurality of microprocessor sockets each adapted to receive a microprocessor, and a plurality of switches corresponding to a respective microprocessor socket. The plurality of microprocessor sockets are adapted to form a serial signal path, and each of the switches is capable of automatically detecting whether a microprocessor is present in the corresponding microprocessor socket. If a microprocessor is present, the switch is automatically configured to include the microprocessor within the signal path, and if the microprocessor is not present, the switch is automatically configured so that the signal path bypasses that microprocessor socket.Type: GrantFiled: October 19, 2000Date of Patent: March 8, 2005Assignee: Dell Products, L.P.Inventor: Martin McAfee
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Publication number: 20050010827Abstract: A method of responding to a thermal trip signal generated by a processor of a system having multiple processor nodes. If a processor overheats beyond a critical temperature, a temperature monitor receives the thermal trip signal, and turns off an enable signal to a voltage control module that control power to the processors. The temperature monitor also triggers a system reset. Upon reset, the temperature monitor ensures that all nodes, other than the node with the overheated processor, return to an operational state.Type: ApplicationFiled: July 10, 2003Publication date: January 13, 2005Applicant: Dell Products L.P.Inventors: Martin McAfee, Kevin Miller, Robert Nance, Robert Tung
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Publication number: 20040215991Abstract: In an information handling system, voltage regulator modules (VRM) are first enabled and determined to be operational before enabling an associated processor. If a VRM is determined not to be operational, then the associated processor is disabled. Once all VRMs are determined to be operational or not operational and the associated processors are enabled or disabled as the case may be, the information handling system is operationally started-up with all operational VRMs and associated processors functioning.Type: ApplicationFiled: April 23, 2003Publication date: October 28, 2004Applicant: Dell Products L.P.Inventors: Martin McAfee, Bharath Vasudevan
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Publication number: 20040148542Abstract: An information handling system includes first and second I/O controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.Type: ApplicationFiled: January 23, 2003Publication date: July 29, 2004Applicant: Dell Products L.P.Inventors: Martin McAfee, Bharath Vasudevan