Abstract: The invention concerns a circuit for transferring a data from one clock domain to another clock domain, the circuit comprising: a digital circuit configured to generate a data signal synchronized with a source clock signal, and to receive such data by sampling the data signal synchronized with a target clock signal; a phase comparator which is configured to determine a phase relationship between the source clock signal and the target clock signal; and a data signal synchronization circuit configured to receive data signal transitions that are synchronized with the source clock signal, and to provide a synchronized data signal transitions of which are synchronized with the target clock signal.

Abstract: An electronic circuit for converting a signal between digital and analog in a burst mode, including a processor configured to utilize a synchronizing clock signal, a converter configured to convert a signal data between digital and analog using a converter clock signal, a phase comparator configured to determine a phase relationship between the synchronizing clock signal and the converter clock signal, and a digital signal processor coupled to the phase comparator and configured to receive an information about the phase relationship, wherein the digital signal processor is configured to apply a delay to the signal data being exchanged between the processor and. The synchronizing clock signal and the converter clock signal have a predetermined frequency relationship.

Abstract: An apparatus for providing a supply voltage to a device under test includes: a controlled source; a switchable resistor circuited between the output of the controlled source and a dut port, having a comparatively smaller first resistance in a first switch state and a second resistance in a second switch state; a regulator that provides a control signal to the controlled source, to regulate a voltage to be provided to the dut. The apparatus changes a switch state of the switchable resistor while a voltage is provided to the dut via the switchable resistor. The apparatus injects a compensation signal into a control loop including the regulator, the controlled source and the switchable resistor, to thereby cause a change of the voltage provided by the controlled source, to at least partially compensate a change of a voltage drop across the switchable resistor.

Abstract: An apparatus for providing a supply voltage to a device under test includes a controlled source configured to provide a voltage in dependence on one or more control signals; a switchable resistor circuited between the output of the controlled source and a DUT port, having first and second resistances in first and second switch states, respectively, the second resistance being smaller than the first resistance; a regulator configured to provide a control signal to the controlled source, to regulate a voltage to be provided to the DUT in dependence on information about a desired voltage; a capacitor circuited in parallel to the switchable resistor at least during switching of the switchable resistor and configured to slow a voltage change across the switchable resistor which is caused by changing a switch state of the switchable resistor; the apparatus being configured to change a switch state of the switchable resistor while a voltage is provided to the DUT via the switchable resistor.

Abstract: An apparatus for providing a supply voltage to a device under test includes a controlled source configured to provide a voltage in dependence on one or more control signals; a switchable resistor circuited between the output of the controlled source and a DUT port, having first and second resistances in first and second switch states, respectively, the second resistance being smaller than the first resistance; a regulator configured to provide a control signal to the controlled source, to regulate a voltage to be provided to the DUT in dependence on information about a desired voltage; a capacitor circuited in parallel to the switchable resistor at least during switching of the switchable resistor and configured to slow a voltage change across the switchable resistor which is caused by changing a switch state of the switchable resistor; the apparatus being configured to change a switch state of the switchable resistor while a voltage is provided to the DUT via the switchable resistor.

Abstract: An apparatus for providing a supply voltage to a device under test includes: a controlled source; a switchable resistor circuited between the output of the controlled source and a dut port, having a comparatively smaller first resistance in a first switch state and a second resistance in a second switch state; a regulator that provides a control signal to the controlled source, to regulate a voltage to be provided to the dut. The apparatus changes a switch state of the switchable resistor while a voltage is provided to the dut via the switchable resistor. The apparatus injects a compensation signal into a control loop including the regulator, the controlled source and the switchable resistor, to thereby cause a change of the voltage provided by the controlled source, to at least partially compensate a change of a voltage drop across the switchable resistor.

Abstract: A calibration module for a tester, for testing a device under test, includes a pair of RF-channel terminals, a calibration device, a pair of measurement terminals and a mode selector. The pair of RF-channels terminals is configured to send or receive measurement signals to or from an RF-channel of the tester. The calibration device is configured to perform a calibration of the RF-channel based on the measurement signals sent to, or received from, the RF-channel. The pair of measurement terminals is configured to send or receive measurement signals to or from the device under test. The mode selector is configured to connect, in a calibration phase, the pair or RF-channel terminals to the calibration device for calibrating the RF-channel and to connect, in a measurement phase, the pair of RF-channel terminals to the pair of measurement terminals for routing measurement signals from the RF-channel to the device under test or vice versa.

Abstract: A calibration module for a tester, for testing a device under test, includes a pair of RF-channel terminals, a calibration device, a pair of measurement terminals and a mode selector. The pair of RF-channels terminals is configured to send or receive measurement signals to or from an RF-channel of the tester. The calibration device is configured to perform a calibration of the RF-channel based on the measurement signals sent to, or received from, the RF-channel. The pair of measurement terminals is configured to send or receive measurement signals to or from the device under test. The mode selector is configured to connect, in a calibration phase, the pair or RF-channel terminals to the calibration device for calibrating the RF-channel and to connect, in a measurement phase, the pair of RF-channel terminals to the pair of measurement, terminals for routing measurement signals from the RF-channel to the device under test or vice versa.

Abstract: The invention relates to a device and a method for reducing pain on a human or animal body using at least two electrodes as part of an electrode assembly. The device includes an electrode assembly, the surface of which can be brought into contact with the surface of a human or animal body, a pulse generating unit for applying current to the electrode assembly, and a vibration unit for vibration of the electrode assembly.

Abstract: A calibration module for a tester, for testing a device under test, includes a pair of RF-channel terminals, a calibration device, a pair of measurement terminals and a mode selector. The pair of RF-channel terminals is configured to send or receive measurement signals to or from an RF-channel of the tester. The calibration device is configured to perform a calibration of the RF-channel based on the measurement signals sent to, or received from, the RF-channel. The pair of measurement terminals is configured to send or receive measurement signals to or from the device under test. The mode selector is configured to connect, in a calibration phase, the pair or RF-channel terminals to the calibration device for calibrating the RF-channel and to connect, in a measurement phase, the pair of RF-channel terminals to the pair of measurement terminals for routing measurement signals from the RF-channel to the device under test or vice versa.

Abstract: A calibration module for a tester, for testing a device under test, includes a pair of RF-channel terminals, a calibration device, a pair of measurement terminals and a mode selector. The pair of RF-channel terminals is configured to send or receive measurement signals to or from an RF-channel of the tester. The calibration device is configured to perform a calibration of the RF-channel based on the measurement signals sent to, or received from, the RF-channel. The pair of measurement terminals is configured to send or receive measurement signals to or from the device under test. The mode selector is configured to connect, in a calibration phase, the pair or RF-channel terminals to the calibration device for calibrating the RF-channel and to connect, in a measurement phase, the pair of RF-channel terminals to the pair of measurement terminals for routing measurement signals from the RF-channel to the device under test or vice versa.

Abstract: A noise signal generator includes a random word generator for generating a sequence of random words, each word representing an input value, a mapping unit for receiving the sequence of random words, mapping each input value to an output value of according to a probability distribution function, and providing a corresponding sequence of output values, and a digital-to-analog converter for generating a noise signal based on the output values.

Abstract: The present invention relates to a method and a corresponding system for generating a binary pulse stream (37) based on a stable clock (76), said method being characterized by the steps of: reading a sequence of pairs of values representing LOW and HIGH state duration, respectively, of consecutive pulses of said binary pulse stream (37), said pairs of values being related to said stable clock (76), providing for each value an integral multiple part and a fractional part of the cycle time of said stable clock (76), using said integral multiple part for controlling an edge forming unit (40), said edge forming unit (40) contributes said integral multiple part of the duration of the respective state of the respective pulse to said binary pulse stream (37) to be generated, and using said fractional part for controlling a delay modulation unit (42), said delay modulation unit (42) prolongs, according to said fractional part, the duration of the respective state of the respective pulse to said binary pulse stream (3

Abstract: The invention relates to noise signal generator, comprising a random word generator for generating a sequence of random words, each word representing an input value, a mapping unit for receiving the sequence of random words, mapping each input value to an output value of according to a probability distribution function, and providing a corresponding sequence of output values, and a digital-to-analog converter for generating a noise signal based on the output values.

Abstract: The invention relates to a signal generator for generating a sequence of digital values according to a reference clock signal, comprising at least one input terminal for receiving a an increment signal and an offset signal, a start value circuit adapted for determining a counter start value on the base of the offset signal and the increment signal, a counter being adapted to be set to the start value, and to change the counter position at each cycle of the reference clock signal to a new value according to the increment signal until a defined value is achieved, and an output terminal for outputting the counter values.