Abstract: An electronic package has a cover or lid mounted onto a substrate to enclose an electronic device, and a liquid thermal interface material is subsequently inserted (through dispensing, injection molding or printing through apertures in the cover or lid) between the surface of the electronic device and the cover, and cured to a solid state.

Abstract: During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots.

Abstract: During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots.

Abstract: During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots.

Abstract: An electronic package has a cover or lid mounted onto a substrate to enclose an electronic device, and a liquid thermal interface material is subsequently inserted (through dispensing, injection molding or printing through apertures in the cover or lid) between the surface of the electronic device and the cover, and cured to a solid state.

Abstract: During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots.

Abstract: Provided is a method of manufacturing a multi-frequency surface acoustic wave (SAW) device on a common piezoelectric substrate. The method features varying the resonant frequency of waveguide elements of the SAW device using a single etch step. The etch step removes a sub-portion of multiple layers of conductive film disposed on the substrate.

Abstract: Provided is a method of manufacturing a multi-frequency surface acoustic wave (SAW) device on a common piezoelectric substrate. The method features varying the resonant frequency of waveguide elements of the SAW device using a single etch step. The etch step removes a sub-portion of multiple layers of conductive film disposed on the substrate.

Abstract: A system and method for manufacturing a thermal expansion pre-compensated package system. The system including a substrate having a first and a second planar surface. The first planar surface being opposed to the second planar surface. The system further including a mold compound having a third and a fourth planar surface. The fourth planar surface affixed to the first planar surface of the substrate to provide a low stress interface. A cavity is formed in the third planar surface of the mold compound.

Abstract: Provided is a method of manufacturing a multi-frequency surface acoustic wave (SAW) device on a common piezoelectric substrate. The method features varying the resonant frequency of waveguide elements of the SAW device using a single etch step. The etch step removes a sub-portion of multiple layers of conductive film disposed on the substrate.

Abstract: Provided is a method of manufacturing a multi-frequency surface acoustic wave (SAW) device on a common piezoelectric substrate. The method features varying the resonant frequency of waveguide elements of the SAW device using a single etch step. The etch step removes a sub-portion of multiple layers of conductive film disposed on the substrate.

Abstract: A method of manufacturing a hermetic package. In one embodiment, the method includes: (1) forming a plurality of contact-sensitive electronic devices on a device substrate, each of the plurality of devices having an active surface, (2) providing a mounting substrate, (3) forming a grid of dam material between the device substrate and the mounting substrate that is pitched as a function of lateral dimensions of the plurality of devices, (4) bringing the device substrate and the mounting substrate together until the active surface of each of the plurality of devices is proximate, but spaced apart from, the mounting substrate, the mounting substrate and the dam material cooperating to form packages for the plurality of devices and (5) dicing the device substrate to separate the packages.

Abstract: A hermetic package for an electronic device, such as a surface acoustic wave (SAW) device and a method of manufacturing the same. In one embodiment, the package includes: (1) a device substrate having: (a) an active region containing an electrically conductive pattern that constitutes at least a portion of the device, (b) a contact region surrounding the active region and containing bond pads that are electrically coupled to the pattern and (c) a bonding region surrounding the active region, (2) a non-porous mounting substrate having a bonding region thereon and a footprint smaller than a footprint of the device substrate and (3) a bonding agent, located between the bonding region of the device substrate and the bonding region of the mounting substrate, that bonds the device substrate to the mounting substrate to enclose the active region proximate a void between the device substrate and the mounting substrate, the contact region remaining exposed.

Abstract: The present invention provides a surface acoustic wave (SAW) circuit package including: (1) a substantially planar piezoelectric substrate having an active surface, (2) an electronic circuit located over the active surface, (3) an encapsulant substrate having a bonding surface and (4) a bonding material interposing and creating a hermetic seal between the active surface and the bonding surface and around a void between the piezoelectric substrate and the encapsulant substrate. In one embodiment, the void has lateral dimensions at least equaling a footprint of the electronic circuit.

Abstract: A hermetic package for a pyroelectric-sensitive electronic device and methods of manufacturing one or more of such packages. In one embodiment, the package includes: (1) a device substrate having: (1a) an active region containing an electrically conductive pattern that constitutes at least a portion of the device and (1b) a bonding region surrounding the active region, (2) a non-porous mounting substrate having a bonding region thereon and (3) a nonmetallic hermetic sealing adhesive, located between the bonding region of the device substrate and the bonding region of the mounting substrate, that cures at a temperature substantially below a pyroelectric sensitive temperature of the device, the active region proximate a void between the device substrate and the mounting substrate.

Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system while reducing contact degradation due to stress that results from differences in the coefficients of thermal expansion of the various components during thermal cycling

Abstract: A module for receiving a function circuit and a method of manufacturing such module. In one embodiment, the module includes: (1) an input surface acoustic wave (SAW) circuit, located within the module and couplable to an input of the function circuit, that conditions an input signal provided to the function circuit and (2) an output SAW circuit, located within the module and couplable to an output of the function circuit, that conditions an output signal produced by the function circuit.

Abstract: A method and a system for wafer level burn-in testing of a circuit featuring a flip-jumper to permit selectively connecting signals to the interconnect sites on the wafer that are in constant electrical communication with the circuit.

Abstract: A module and method for interconnecting integrated circuits. The module includes an insulative body that features conductive traces having differing resistivities associated therewith. To that end, the insulative body has, disposed therein, a conductive bond pad and a plurality of spaced apart conductive traces, one of which is in electrical communication with the bond pad, with each of the plurality of conductive traces are formed from a material having a resistivity associated therewith. The resistivity of the material from which one of the plurality of conductive traces is formed being greater than the resistivity of the material from which the remaining conductive traces are formed and defines a decoupling capacitor therebetween.

Abstract: Provided is a mount for an integrated circuit that features a routing carrier having first and second power planes and first and second signal layers. The first and second signal layers are disposed between the first and second power planes so that the return path for current propagating along the signal layers is in one of the adjacent power planes. To that end, another embodiment of the present invention provides that the distances between the signal layers and power planes are substantially constant over the volume of the routing carrier to ensure, which provides a constant impedance between one of the first and second signal layers and the power plane adjacent thereto.