Abstract: The present disclosure provides a semiconductor electrostatic discharge (ESD), protection device, and relates to electrostatic discharge protection circuit. The semiconductor device includes a substrate of a first charge type, an epitaxial layer of a second type, an electrical insulation, a first contact region of the first charge type, and at least one second contact region of the second type, the epitaxial layer is arranged on the substrate, the electrical insulation extends from an outer surface of the epitaxial layer toward the substrate so that it creates a plurality of sectors where a current from each one of the sectors must flow toward any other sector through the substrate, and the first contact region and the at least one second contact region are formed on the outer surface of the epitaxial layer so that each of the first contact region and at least one second contact region are in different sectors.

Abstract: An open base transistor has an emitter region of a first doping polarity, a collector region of the first doping polarity, a base region of a second polarity different from the first doping polarity, and an additional region of the first doping polarity. The base region is resistively connected to the additional region via a resistor.

Abstract: A novel treatment method is disclosed, wherein a patch configured to be placed on a patient's skin is activated, before placement, to deliver localized radiotherapy to a diseased area of the skin. The disclosed devices and methods minimize or prevent collateral damage to the neighboring tissues. In most cases, the disclosed devices and methods include coating a contoured, solid, flexible or conformal substrate with one or more lanthanide elements and then activating (e.g. neutron irradiation) the elements such that its resulting radioisotope emits beta-particles into the diseased skin surface when applied to the patient's skin. Novel processes are described for fabricating and irradiating the lanthanide-based skin patch, for example a holmium-based skin patch.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A, L, X, m, n, R1 and R2 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A and R1 to R4 are as described heroin, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: An electrostatic discharge (ESD), protection device is provided. In accordance with the present disclosure, an ESD protection device is provided that includes a series connection of a first unit having strong snapback and low series capacitance and a second high-voltage unit that displays a relatively high holding/trigger voltage to ensure latch up and improper triggering of the ESD protection device while at the same time providing high-voltage operation with low capacitive loading.

Abstract: A discharge protection semiconductor structure is provided that includes a substrate, a well positioned on the substrate, a first contact diffusion and a second contact diffusion, the first contact diffusion and the second contact diffusion positioned on the top side of the well, and a resistor positioned between the first contact diffusion and a second contact diffusion.

Abstract: A dual silicone no-lead (DSN), semiconductor device package is provided, the bond pad to the terminal includes an additional area in the second metallization layer, which is rectangularly shaped and extends from one side, e.g., the middle, of the terminal towards a location above the semiconductor device.

Abstract: The invention provides new MAGL inhibitors having the general formula (I) wherein the variables are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A, B, X, and R1 to R7 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: A current-controlled semiconductor system is provided, including a signal and a ground line, and a semiconductor controlled rectifier (SCR) device including a first SCR layer doped with a first type of charge carriers; a second SCR layer doped with a second type different from the first type; a third SCR layer doped with the first type; a fourth SCR layer doped with the second type; an input terminal connected with the first SCR layer and the signal line and an output terminal connected with the fourth SCR layer and ground line; at least a first SCR junction element connected with the second SCR layer and the signal line, and/or a second SCR junction element connected with the third SCR layer and the ground line, the system includes at least one current trigger device connecting the signal line with the third SCR layer or the ground line with second SCR layer.

Abstract: A semiconductor device is provided, more particularly, a semiconductor controlled rectifier device (SCR) device, which achieves low capacitance, low trigger voltage, fast turn-on, and low on-resistance. Additionally, the semiconductor controlled rectifier device (SCR) device can achieve low capacitance, low trigger voltage, fast turn-on, and low on-resistance at the same time.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein B, C, L, X, Y, RL and R3 to R5 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: A semiconductor device is provided that includes a first n+ region, a first p+ region within the first n+ region, a second n+ region, a second p+ region, positioned between the first n+ region and the second n+ region. The first n+ region, the second n+ region and the second p+ region are positioned within a p? region. A first space charge region and a second space charge region are formed within the p? region. The first space region is positioned between the first n+ region and the second p+ region, and the second space region is positioned between the second p+ region and the second n+ region.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A, L, X, m, n, R1 and R2 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A, B, L1, X, m, n, and R1 to R7 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I) wherein A, L, X, m, n, R1 and R2 are as described herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: This disclosure relates to a semiconductor device including a device with high clamping voltage (HVC device), and an OTS device. Such a semiconductor device provides very advantageous ESD protection. The semiconductor device can be realized in two ways: an OTS device and a device with high clamping voltage can be realized as discrete, independent devices that are combined in one semiconductor package, or an OTS device can be integrated into interconnect layers of a device with high clamping voltage by integration.

Abstract: An electrostatic discharge (ESD), protection device is provided. In accordance with the present disclosure, an ESD protection device is provided that includes a series connection of a first unit having strong snapback and low series capacitance and a second high-voltage unit that displays a relatively high holding/trigger voltage to ensure latch up and improper triggering of the ESD protection device while at the same time providing high-voltage operation with low capacitive loading.

Abstract: A semiconductor device is provided including a die having an electronic component integrated thereon. The component includes regions in the die, including a first region of a first charge type electrically connected to a first device terminal, a second region of a second charge type forming a first PN junction with the first region, a third region of the first charge type forming a second PN junction with the second region, the third region being spaced apart from the first region by the second region and being electrically connected to the second device terminal, a fourth region of the first charge type forming a third PN junction with the second region, the fourth region being spaced apart from the first region and third region by the second region. The device further includes an electronic unit electrically connected between the first device terminal, the second device terminal and the fourth region.