Abstract: This application concerns quantum computing devices and, more specifically, techniques for compiling a high-level description of a quantum program to be implemented in a quantum-computing device into a lower-level program that is executable by a quantum-computing device, where the high-level description of the quantum program to be implemented in a quantum-computing device supports at least one of loops and/or branches.

Abstract: A quantum prediction AI system includes a quantum prediction circuit adapted to receive an input vector representing a subset of a time-sequential sequence; encode the input vector as a corresponding qubit register; apply a trained quantum circuit to the qubit register; and measure one or more qubits output from the quantum prediction circuit to infer a next data point in the series following the subset represented by the input vector.

Abstract: Quantum memory management is becoming a pressing problem, especially given the recent research effort to develop new and more complex quantum algorithms. The disclosed technology concerns various example memory management schemes for quantum computing. For example, certain embodiments concern methods for managing quantum memory based on reversible pebbling games constructed from SAT-encodings.

Abstract: Embodiments of the disclosed technology concern transforming a high-level quantum-computer program to one or more symbolic expressions. Because the transformations lead to symbolic expressions in the compiled code, one can extract these to arrive at symbolic resource estimates for the quantum program. In cases where these transformations do not yield closed-form solutions, they can still be evaluated many orders of magnitude faster than it was possible using other resource estimation tools. Having access to such symbolic or near-symbolic expressions not only greatly improves the performance of accuracy management and resource estimation, but also better informs quantum software developers of the bottlenecks that may be present in the quantum program. In turn, the underlying quantum-computer program can be improved as appropriate.

Abstract: None of the existing quantum programming languages provide specialized support for programming patterns such as conditional-adjoint or adjoint-via-conjugation. As a result, compilers of these languages fail to exploit the optimization opportunities mentioned in this disclosure. Further, none of the available quantum programming languages provide support for automatic translation of circuits using clean qubits to circuits that use idle qubits. Thus, the resulting circuits oftentimes use more qubits than would be required. Embodiments of the disclosed technology, thus allow one to run said circuits on smaller quantum devices. Previous multiplication circuits make use of (expensive) controlled additions. Embodiments of the disclosed technology employ multipliers that work using conditional-adjoint additions, which are cheaper to implement on both near-term and large-scale quantum hardware. The savings lie between 1.5 and 2× in circuit depth for large number of qubits.

Abstract: The disclosed technology includes, among other innovations, a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. In particular embodiments, the disclosed technology reduces the memory footprint of a reversible network implemented in a quantum computer and generated from a higher-level program. Such a reduced-memory footprint is desirable in that it addresses the limited availability of qubits available in many target quantum computer architectures.

Abstract: This application concerns methods, apparatus, and systems for performing quantum circuit synthesis and/or for implementing the synthesis results in a quantum computer system. In certain example embodiments: a universal gate set, a target unitary described by a target angle, and target precision is received (input); a corresponding quaternion approximation of the target unitary is determined; and a quantum circuit corresponding to the quaternion approximation is synthesized, the quantum circuit being over a single qubit gate set, the single qubit gate set being realizable by the given universal gate set for the target quantum computer architecture.

Abstract: Embodiments of the disclosed technology employ parametric coordinate ascent to train a quantum circuit. In certain implementations, parameters (e.g., variational parameters) are learned by coordinate ascent using closed form equations. This strategy helps ensure monotonic convergence to local maxima in parameter space at predictable convergence rates and eliminates the overhead due to hyperparameter sweeps.

Abstract: This application concerns quantum computing devices. Certain embodiments comprise receiving a high-level description of a quantum program to be implemented in a quantum-computing device, and compiling the high-level description of the quantum program into a lower-level program that is executable by a quantum-computing device, wherein the high-level description of the quantum program to be implemented in a quantum-computing device supports at least one of loops and branches.

Abstract: A Probabilistic Quantum Circuit with Fallback (PQFs) is composed as a series of circuit stages that are selected to implement a target unitary. A final stage is conditioned on unsuccessful results of all the preceding stages as indicated by measurement of one or more ancillary qubits. This final stage executes a fallback circuit that enforces deterministic execution of the target unitary at a relatively high cost (mitigated by very low probability of the fallback). Specific instances of general PQF synthesis method and are disclosed with reference to the specific Clifford+T, Clifford+V and Clifford+?/12 bases. The resulting circuits have expected cost in logb(1/?)+O(log(log(1/?)))+const wherein b is specific to each basis. The three specific instances of the synthesis have polynomial compilation time guarantees.

Abstract: None of the existing quantum programming languages provide specialized support for programming patterns such as conditional-adjoint or adjoint-via-conjugation. As a result, compilers of these languages fail to exploit the optimization opportunities mentioned in this disclosure. Further, none of the available quantum programming languages provide support for automatic translation of circuits using clean qubits to circuits that use idle qubits. Thus, the resulting circuits oftentimes use more qubits than would be required. Embodiments of the disclosed technology, thus allow one to run said circuits on smaller quantum devices. Previous multiplication circuits make use of (expensive) controlled additions. Embodiments of the disclosed technology employ multipliers that work using conditional-adjoint additions, which are cheaper to implement on both near-term and large-scale quantum hardware. The savings lie between 1.5 and 2× in circuit depth for large number of qubits.

Abstract: Embodiments of the disclosed technology concern transforming a high-level quantum-computer program to one or more symbolic expressions. Because the transformations lead to symbolic expressions in the compiled code, one can extract these to arrive at symbolic resource estimates for the quantum program. In cases where these transformations do not yield closed-form solutions, they can still be evaluated many orders of magnitude faster than it was possible using other resource estimation tools. Having access to such symbolic or near-symbolic expressions not only greatly improves the performance of accuracy management and resource estimation, but also better informs quantum software developers of the bottlenecks that may be present in the quantum program. In turn, the underlying quantum-computer program can be improved as appropriate.

Abstract: A quantum prediction AI system includes a quantum prediction circuit adapted to receive an input vector representing a subset of a time-sequential sequence; encode the input vector as a corresponding qubit register; apply a trained quantum circuit to the qubit register; and measure one or more qubits output from the quantum prediction circuit to infer a next data point in the series following the subset represented by the input vector.

Abstract: The disclosed technology includes, among other innovations, a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. In particular embodiments, the disclosed technology reduces the memory footprint of a reversible network implemented in a quantum computer and generated from a higher-level program. Such a reduced-memory footprint is desirable in that it addresses the limited availability of qubits available in many target quantum computer architectures.

Abstract: The disclosed technology includes, among other innovations, a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. In particular embodiments, the disclosed technology reduces the memory footprint of a reversible network implemented in a quantum computer and generated from a higher-level program. Such a reduced-memory footprint is desirable in that it addresses the limited availability of qubits available in many target quantum computer architectures.

Abstract: Ripple-carry and carry look-ahead adders for ternary addition and other operations include circuits that produce carry values or carry status indicators that can be stored on qutrit registers associated with input values to be processed. Inverse carry circuits are situated to reverse operations associated with the production of carry values or carry status indicators, and restored values are summed with corresponding carry values to produce ternary sums.

Abstract: Quantum algorithms to solve practical problems in quantum chemistry, materials science, and matrix inversion often involve a significant amount of arithmetic operations. These arithmetic operations are to be carried out in a way that is amenable to the underlying fault-tolerant gate set, leading to an optimization problem to come close to the Pareto-optimal front between number of qubits and overall circuit size. In this disclosure, a quantum circuit library is provided for floating-point addition and multiplication. Circuits are presented that are automatically generated from classical Verilog implementations using synthesis tools and compared with hand-generated and hand-optimized circuits. Example circuits were constructed and tested using the software tools LIQUi| and RevKit.

Abstract: Quantum memory management is becoming a pressing problem, especially given the recent research effort to develop new and more complex quantum algorithms. The disclosed technology concerns various example memory management schemes for quantum computing. For example, certain embodiments concern methods for managing quantum memory based on reversible pebbling games constructed from SAT-encodings.

Abstract: The generation of reversible circuits from high-level code is desirable in a variety of application domains, including low-power electronics and quantum computing. However, little effort has been spent on verifying the correctness of the results, an issue of particular importance in quantum computing where such circuits are run on all inputs simultaneously. Disclosed herein are example reversible circuit compilers as well as tools and techniques for verifying the compilers. Example compilers disclosed herein compile a high-level language into combinational reversible circuits having a reduced number of ancillary bits (ancilla bits) and further having provably clean temporary values.

Abstract: In this application, example methods for performing quantum Montgomery arithmetic are disclosed. Additionally, circuit implementations are disclosed for reversible modular arithmetic, including modular addition, multiplication and inversion, as well as reversible elliptic curve point addition. This application also shows that elliptic curve discrete logarithms on an elliptic curve defined over an n-bit prime field can be computed on a quantum computer with at most 9n+2?log2(n)?+10 qubits using a quantum circuit of at most 512n3 log2(n)+3572n3 Toffoli gates.