Abstract: An FPGA has a number of CLBs, each CLB having a number of CABs (10, 110, 210, 310, 410). Each CAB (10, 110, 210, 310, 410) comprises: a number of configurable transistors (20, 120, 220, 320, 420) each comprising one or more useable transistors M and a number of switching transistors; and, configuration circuitry comprising a number of switching transistors. The ratio of switching transistors to useable transistors for each CAB is less than 26:1. A method of configuring such an FPGA comprises optimizing each configurable transistor.

Abstract: An FPGA has a number of CLBs, each CLB having a number of CABs (10, 110, 210, 310, 410). Each CAB (10, 110, 210, 310, 410) comprises: a number of configurable transistors (20, 120, 220, 320, 420) each comprising one or more useable transistors M and a number of switching transistors; and, configuration circuitry comprising a number of switching transistors. The ratio of switching transistors to useable transistors for each CAB is less than 26:1. A method of configuring such an FPGA comprises op timising each configurable transistor.

Abstract: An apparatus for dry-leaning dust-contaminated auxiliary objects for handling and storing semiconductor wafers is disclosed and comprises a housing having a receiving opening and a closable lid for closing the opening. The housing further includes a receiving space for receiving an auxiliary object and a collecting space spatially separated therefrom, gas inlet nozzles having corresponding gas outlet openings in the receiving space for injecting a cleaning gas into the receiving space, and a gas draw-off opening in the collecting space for receiving the injected cleaning gas flowing from the receiving space to the collecting space. As the injected cleaning gas flows over the auxiliary object from the receiving space to the collecting space, the dust particles are removed from the auxiliary object by the flow of injected cleaning gas over the auxiliary object and delivered to said gas draw-off opening for disposal.