Abstract: A compact high-density packaging arrangement for high-performance semiconductor devices includes a plurality of high-performance semiconductor chips connected to a multilayer daughter substrate member using a bare chip assembly technique known as bonded pin technology. Internal bonded pins are formed on bonding pads of the chips and soldered to conductive pads in solder wells located on the daughter substrate to provide a first level of interconnection for the chips. A larger, multilayer mother substrate member has a plurality of apertures formed in one surface thereof. These apertures are terminated by a top side of a metallized base layer of the substrate. An opposite surface of the mother substrate, i.e. a bottom side of the base layer, is affixed in thermal conductive relation to a metallic cold plate adapted for receiving a cooling fluid. External bonded pins are formed on bonding pads of the daughter substrate and inserted into corresponding solder wells located on the mother substrate.

Abstract: An address generator for corner turn memories which are dimensioned in integral powers of two is disclosed. A binary adder is utilized to combine the current address with a binary number which specifies the amount to be added to the current address to generate the next address of the corner turn sequence. Limiting the dimensions of the memory to integral powers of two simplifies the circuitry necessary to generate the corner turn address sequence.

Abstract: A storage controller for independently controlling the transfer of vectors of data into and out of a memory from a plurality of input devices and a digital signal processor capable of performing complex arithmetic functions. Program instructions, stored in the memory of the storage controller, specify the sequence of vector transfer between each device and the memory. The storage controller recognizes a request for a transfer of a vector of data from each device and selects one for a vector transfer according to predetermined priorities. The storage controller, under program control, repeats the execution of each program instruction word a predetermined number of times, generating upon each repeated execution a new address in the memory, whereby a vector of data is transferred between the memory and the selected device or vice versa.