Abstract: We disclose a pharmaceutical composition adapted for oral delivery comprising native testosterone; a treatment regimen comprising administration of the composition(s); and methods and uses for the treatment of hormone related conditions such as hypogonadism in human male, female and transgender subjects.

Abstract: A parallel processor for processing a plurality of different processing instruction streams in parallel is described. The processor comprises a plurality of data processing units; and a plurality of SIMD (Single Instruction Multiple Data) controllers, each connectable to a group of data processing units of the plurality of data processing units, and each SIMD controller arranged to handle an individual processing task with a subgroup of actively connected data processing units selected from the group of data processing units. The parallel processor is arranged to vary dynamically the size of the subgroup of data processing units to which each SIMD controller is actively connected under control of received processing instruction streams, thereby permitting each SIMD controller to be actively connected to a different number of processing units for different processing tasks.

Abstract: The disclosure relates to a pharmaceutical formulation comprising hydrocortisone and its use in the treatment of conditions that would benefit from a delayed release of hydrocortisone, in particular conditions such as adrenal insufficiency, inflammatory conditions and depression.

Abstract: The disclosure relates to a pharmaceutical formulation comprising hydrocortisone and its use in the treatment of conditions that would benefit from a delayed release of hydrocortisone, in particular conditions such as adrenal insufficiency, inflammatory conditions and depression.

Abstract: The disclosure relates to a pharmaceutical formulation comprising hydrocortisone and its use in the treatment of conditions that would benefit from a delayed release of hydrocortisone, in particular conditions such as adrenal insufficiency, inflammatory conditions and depression.

Abstract: The disclosure relates to the treatment of adrenal insufficiency with particular but not limiting application to pediatric treatment regimens, the treatment of the elderly and non-human animals.

Abstract: The disclosure relates to the treatment of adrenal insufficiency with particular but not limiting application to paediatric treatment regimens, the treatment of the elderly and non-human animals.

Abstract: The disclosure relates to the treatment of adrenal insufficiency with particular but not limiting application to pediatric treatment regimens, the treatment of the elderly and non-human animals.

Abstract: The disclosure relates to pharmaceutical compositions useful in the treatment of adrenal insufficiency in paediatric or elderly subjects.

Abstract: The disclosure relates to pharmaceutical compositions useful in the treatment of adrenal insufficiency in paediatric or elderly subjects.

Abstract: Methods and apparatus for conducting motion searching are provided. A first 2D array includes interconnected multi-directional shift registers for storing and shifting image values corresponding to a search window within a search region. A second 2D array includes registers for storing image values corresponding to a macroblock. A distortion calculation module is arranged to calculate and output a distortion value corresponding to the difference between image values stored in associated registers of the first and second arrays. The distortion value quantifies the correlation between the search window and the macroblock. The shift registers of the first 2D array are controlled to pass image values between adjacent shift registers to translate the position of the search window within the search region. Distortion values outputted after progressive shifts of the first 2D array are tracked to determine an optimal registration position of the macroblock relative to the search region.

Abstract: A parallel processor for processing a plurality of different processing instruction streams in parallel is described. The processor comprises a plurality of data processing units; and a plurality of SIMD (Single Instruction Multiple Data) controllers, each connectable to a group of data processing units of the plurality of data processing units, and each SIMD controller arranged to handle an individual processing task with a subgroup of actively connected data processing units selected from the group of data processing units. The parallel processor is arranged to vary dynamically the size of the subgroup of data processing units to which each SIMD controller is actively connected under control of received processing instruction streams, thereby permitting each SIMD controller to be actively connected to a different number of processing units for different processing tasks.

Abstract: Improvements Relating to Single Instruction Multiple Data (SIMD) Architectures A parallel processor for processing a plurality of different processing instruction streams in parallel is described. The processor comprises a plurality of data processing units; and a plurality of SIMD (Single Instruction Multiple Data) controllers, each connectable to a group of data processing units of the plurality of data processing units, and each SIMD controller arranged to handle an individual processing task with a subgroup of actively connected data processing units selected from the group of data processing units. The parallel processor is arranged to vary dynamically the size of the subgroup of data processing units to which each SIMD controller is actively connected under control of received processing instruction streams, thereby permitting each SIMD controller to be actively connected to a different number of processing units for different processing tasks.

Abstract: A data movement controller (20) for controlling the movement between a shared data store (18) and a local data store (16) such that the data can be used by a plurality of parallel data processing elements is described. The data movement controller (20) comprises a set of data registers (56, 58, 60) which, in use, are loaded with different data parameters (57, 61, 62) to define a plurality of different ways in which data is transferred between the shared data store (18) and a set of processing elements (12). The data parameters (57, 61, 62) define a set of time delays for transferring portions of the data to predefined ones of the plurality of processing elements (12) and the type of overall data transfer that is to be carried out.

Abstract: The disclosure relates to a pharmaceutical formulation comprising hydrocortisone and its use in the treatment of conditions that would benefit from a delayed release of hydrocortisone, in particular conditions such as adrenal insufficiency, inflammatory conditions and depression.

Abstract: The disclosure relates to the treatment of adrenal insufficiency with particular but not limiting application to paediatric treatment regimens, the treatment of the elderly and non-human animals.

Abstract: Methods and apparatus for conducting motion searching are provided. A first 2D array includes interconnected multi-directional shift registers for storing and shifting image values corresponding to a search window within a search region. A second 2D array includes registers for storing image values corresponding to a macroblock. A distortion calculation module is arranged to calculate and output a distortion value corresponding to the difference between image values stored in associated registers of the first and second arrays. The distortion value quantifies the correlation between the search window and the macroblock. The shift registers of the first 2D array are controlled to pass image values between adjacent shift registers to translate the position of the search window within the search region. Distortion values outputted after progressive shifts of the first 2D array are tracked to determine an optimal registration position of the macroblock relative to the search region.

Abstract: A processing apparatus for processing source code comprising a plurality of single line instructions to implement a desired processing function is described.

Abstract: A system and method of broadcasting data to multiple targets across a system bus, such as the peripheral component interconnect (PCI) bus, that does not normally support broadcast transfers, in which one target responds to the bus transaction and the remaining targets listen in on the bus transaction to receive data from the system bus. The responding target stalls the bus transaction when any of the listening targets communicate to the responding target that they are temporarily unable to accept the data on the bus.

Abstract: Improvements Relating to Single Instruction Multiple Data (SIMD) Architectures A parallel processor for processing a plurality of different processing instruction streams in parallel is described. The processor comprises a plurality of data processing units; and a plurality of SIMD (Single Instruction Multiple Data) controllers, each connectable to a group of data processing units of the plurality of data processing units, and each SIMD controller arranged to handle an individual processing task with a subgroup of actively connected data processing units selected from the group of data processing units. The parallel processor is arranged to vary dynamically the size of the subgroup of data processing units to which each SIMD controller is actively connected under control of received processing instruction streams, thereby permitting each SIMD controller to be actively connected to a different number of processing units for different processing tasks.