Patents by Inventor Martinus Bos
Martinus Bos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260202634Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: ApplicationFiled: January 30, 2026Publication date: July 16, 2026Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal Sahni, Suresh Venkata Pothukuchi
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Patent number: 12674949Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: July 31, 2025Date of Patent: July 7, 2026Assignee: Sicily Merger Sub II, Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12674948Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: July 30, 2025Date of Patent: July 7, 2026Assignee: Sicily Merger Sub II, Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12663580Abstract: A device is disclosed that features a hybrid electro-photonic integrated circuit devices that include an electronic circuit layer mounted on a photonic circuit layer. In one aspect, a device includes a photonic circuit layer including a first surface, a second surface opposite the first surface, and photonic circuit portions tiled together to provide the photonic circuit layer. The photonic circuit layer includes electro-optical transceivers, one or more optical couplers, and waveguides. The waveguides include boundary-crossing waveguides that each extend across a boundary between adjacent photonic circuit portions. Each boundary-crossing waveguide includes an optical connection at the boundary. The optical connection has a width larger than a width of the waveguide away from the boundary. A first photonic circuit layer portion includes first and second electro-optical transceivers and first and second waveguides.Type: GrantFiled: August 15, 2025Date of Patent: June 23, 2026Assignee: Sicily Merger Sub II, Inc.Inventors: David Lazovsky, Martinus Bos, Philip Winterbottom, Subal Sahni
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Publication number: 20260129321Abstract: Systems and methods for switching are disclosed. In an example, a switching system includes a photonic integrated circuit (PIC) having optical ports, an electric integrated circuit (EIC) stacked on the PIC and having switching circuitry, and photonic transceivers optically coupled to the optical ports of the PIC and electrically coupled to the switching circuitry of the EIC, and the switching circuitry is configured to transfer digital signals, which are generated from optical signals received at a first photonic transceiver of the photonic transceivers, to a second photonic transceiver of the photonic transceivers based on information in the digital signals, wherein the first photonic transceiver is optically coupled to a first optical port of the PIC and the second photonic transceiver is optically coupled to a second optical port of the PIC.Type: ApplicationFiled: December 18, 2025Publication date: May 7, 2026Applicant: Celestial AI Inc.Inventors: David Lazovsky, Philip Winterbottom, Francisco Jose Maia da Silva, Martinus Bos
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Publication number: 20260113125Abstract: Various embodiments provide for clock signal distribution within a processor, such as a machine learning (ML) processor, using a photonic fabric.Type: ApplicationFiled: June 23, 2025Publication date: April 23, 2026Inventors: Philip Winterbottom, Martinus Bos
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Publication number: 20260104798Abstract: Multi-chip electro-photonic networks for interconnecting multiple circuit packages via photonic channels. Examples of a computing system include a first circuit package, a second circuit package, and one or more inter-chip bidirectional photonic channels interconnecting the first and second circuit packages. The first circuit package can include one or more memory nodes. The second circuit package can include multiple compute nodes and intra-chip bidirectional photonic channels interconnecting the compute nodes.Type: ApplicationFiled: April 1, 2025Publication date: April 16, 2026Inventors: David LAZOVSKY, Philip WINTERBOTTOM, Martinus BOS
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Publication number: 20260099454Abstract: Systems and methods that include an optical memory module and cache manager for an optical memory module are disclosed. In an example, a memory module includes a photonic integrated circuit (PIC), an electric integrated circuit (EIC) stacked on the PIC and having a first memory interface and a second memory interface, photonic transceivers optically coupled to the PIC and electrically coupled to the EIC, first memory electrically coupled to the first memory interface of the EIC, second memory electrically coupled to the second memory interface of the EIC, the EIC including a cache manager between the first memory interface and the second memory interface, and a memory controller between the first memory and the photonic transceivers, and the PIC, EIC, photonic transceivers, first memory, and second memory are co-packaged.Type: ApplicationFiled: December 11, 2025Publication date: April 9, 2026Applicant: Celestial AI Inc.Inventors: Philip Winterbottom, Martinus Bos, Trung Diep, David Lazovsky, Francisco Jose Maia da Silva
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Patent number: 12566551Abstract: Multi-chip electro-photonic networks for interconnecting multiple circuit packages via photonic channels. Examples of a computing system include a first circuit package, a second circuit package, and one or more inter-chip bidirectional photonic channels interconnecting the first and second circuit packages. The first circuit package can include one or more memory nodes. The second circuit package can include multiple compute nodes and intra-chip bidirectional photonic channels interconnecting the compute nodes.Type: GrantFiled: April 1, 2025Date of Patent: March 3, 2026Assignee: Celestial AI Inc.Inventors: David Lazovsky, Philip Winterbottom, Martinus Bos
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Patent number: 12561059Abstract: Multi-chip electro-photonic networks for interconnecting multiple circuit packages via photonic channels. Examples of a computing system include a first circuit package, a second circuit package, and one or more inter-chip bidirectional photonic channels interconnecting the first and second circuit packages. The first circuit package can include one or more memory nodes. The second circuit package can include multiple compute nodes and intra-chip bidirectional photonic channels interconnecting the compute nodes.Type: GrantFiled: April 3, 2025Date of Patent: February 24, 2026Assignee: Celestial AI Inc.Inventors: David Lazovsky, Philip Winterbottom, Martinus Bos
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Publication number: 20250362466Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: ApplicationFiled: July 30, 2025Publication date: November 27, 2025Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal Sahni
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Publication number: 20250362465Abstract: A photonic integrated circuit (PIC) disposed on a substrate and comprising a semiconductor die hosting an active portion and a passive portion mutually coupled, the active portion being configured to consume electrical power when activated, and the passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion of the PIC; an electronic integrated circuit (EIC) electrically coupled to the active portion of the PIC and comprising components that electrically operate on the active portion of the PIC; and a packaging compound at least partially encapsulating the PIC, the packaging compound defining a cavity on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity.Type: ApplicationFiled: August 6, 2025Publication date: November 27, 2025Inventors: Ankur Aggarwal, Subal Sahni, Philip Winterbottom, Martinus Bos
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Publication number: 20250362467Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: ApplicationFiled: July 31, 2025Publication date: November 27, 2025Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal Sahni
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Publication number: 20250355205Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: ApplicationFiled: July 30, 2025Publication date: November 20, 2025Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal SAHNI
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Patent number: 12468103Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: November 11, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12443000Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: October 14, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12442997Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: October 14, 2025Assignee: Celestial AI, Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12442999Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: October 14, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12442998Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: October 14, 2025Assignee: Celestial AI, Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12436346Abstract: A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.Type: GrantFiled: April 4, 2025Date of Patent: October 7, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni