Abstract: A Doherty amplifier die according to some embodiments includes a substrate having a bandgap of above about 2 eV, a main amplifier, at least one peak amplifier, an input network connected to a first input of the main amplifier and to a second input of the at least one peak amplifier, an output combiner connected to a first output of the main amplifier and to a second output of the at least one peak amplifier; and an isolation structure arranged on the substrate between the input network and the output combiner. The isolation structure is configured to isolate the input network and the output combiner.

Abstract: A package including an IPD according to some embodiments includes a circuit board; and a flip chip (FC) IPD die including a substrate material and at least one capacitor or inductor, The FC IPD die is mounted so that the at least one capacitor or inductor face an upper surface of the circuit board. The package further includes a top-side cooling structure thermally connected to a first planar surface of the FC IPD die. The first planar surface of the FC IPD die includes the substrate material. The package further includes at least one first mechanical support thermally connecting the circuit board to a second planar surface of the FC IPD die. The second planar surface of the FC IPD includes the at least one capacitor or inductor.

Abstract: A device may include at least one drain pad arranged at a first die side of the transistor die and/or at a second die side of the transistor die, the first die side and the second die side being opposed sides of the transistor die. Also, the device may include drain fingers configured to extend from the at least one drain pad longitudinally toward a central location of the transistor die. Furthermore, the device may include source fingers configured to extend from the at least one drain pad longitudinally toward the central location of the transistor die. In addition, the device may include a gate pad and a gate and the gate is configured to extend along implementations of the drain fingers and/or the source fingers. Moreover, the device may include where the gate pad is arranged on an axis at least semi-orthogonally to an axis of the at least one drain pad.

Abstract: A transistor device includes a metal submount; a transistor die arranged on said metal submount; a first integrated passive device (IPD) component that includes a first substrate arranged on said metal submount; and a second integrated passive device (IPD) component that includes a second substrate arranged on the metal submount. Additionally, the first substrate is a different material from the second substrate.

Abstract: A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.

Abstract: A device that includes a metal submount; a first transistor die arranged on said metal submount; a second transistor die arranged on said metal submount; a set of primary interconnects; and a set of secondary interconnects. Additionally, the set of primary interconnects and the set of secondary interconnects are configured to provide RF signal coupling between the first transistor die and the second transistor die by electromagnetic coupling.

Abstract: A component includes a substrate board; a thermal bridge structured and arranged on the substrate board, where the thermal bridge is configured to transfer heat from the substrate board including an area adjacent to or on a hotspot of the substrate board; where the thermal bridge is configured to transfer the heat to another location on the substrate board for removal of the heat from the substrate board; and where the thermal bridge may include silicon carbide.

Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

Abstract: A radio frequency (RF) transistor amplifier includes a package submount. a package frame comprising an electrically insulating member and one or more conductive layers on the package submount and exposing a surface thereof, a transistor die on the surface of the package submount and comprising respective terminals that are electrically connected to the package frame, a protective member covering the transistor die, and one or more electrical components that are attached to the package frame outside the protective member. Related RF power device packages and fabrication methods are also discussed.

Abstract: A device that includes a metal submount; a first transistor die arranged on said metal submount; a second transistor die arranged on said metal submount; a set of primary interconnects; and a set of secondary interconnects. Additionally, the set of primary interconnects and the set of secondary interconnects are configured to provide RF signal coupling between the first transistor die and the second transistor die by electromagnetic coupling.

Abstract: RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

Abstract: A transistor device includes a metal submount; a transistor die arranged on said metal submount; an IPD component arranged on said metal submount, and the IPD component having a baseband damping resistor arranged on a thermally conductive dielectric substrate; and a second IPD component arranged on said metal submount, and the second IPD component may include a baseband decoupling capacitor arranged on a thermally conductive dielectric substrate.

Abstract: A device according to some embodiments includes a first IPD die including a first SiC substrate. The first IPD die has a first surface and a second surface on the first SiC substrate opposite the first surface and includes a first contact and at least one first metal portion on the respective surfaces of the first SiC substrate. The device further includes a second IPD die including a second SiC substrate. The second IPD die has a third surface and a fourth surface on the second SiC substrate opposite the third surface and includes a second contact and at least one second metal portion on the respective surfaces of the second SiC substrate. The device further includes an electrical interconnection structure between one of the first and second surfaces of the first IPD die and one of the third and fourth surfaces of the second IPD die.

Abstract: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Abstract: A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.

Abstract: A device according to some embodiments includes a metal-insulator-metal (MIM) capacitor including a substrate, an upper metal plate, and a lower metal surface attached to a first surface of the substrate. The upper metal plate of the MIM capacitor is configured to serve as a wire bonding surface. Other embodiments include an RF transistor package and a device including a MIM capacitor that includes at least one via.

Abstract: In some aspects, a device includes a substrate. A first metallization arranged on the substrate. A second metallization arranged on the substrate. A circuit arranged on the substrate and electrically connected to the first metallization and the second metallization. The first metallization and the second metallization being configured, structured, and arranged to make a solder connection to a device, where the substrate may include silicon carbide (SiC).

Abstract: A transistor amplifier package includes a package substrate comprising conductive patterns exposed by solder mask patterns at a surface thereof, and at least one transistor die comprising a semiconductor structure attached to the surface of the package substrate by a solder material and aligned by the solder mask patterns such that respective gate, drain, and/or source terminals of the at least one transistor die are electrically connected to respective ones of the conductive patterns. Related transistor amplifiers and fabrication methods are also discussed.

Abstract: A semiconductor device package includes a plurality of input leads and an output lead, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combination circuit configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal to the output lead.

Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.