Patents by Inventor Marvin Tabasky
Marvin Tabasky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6445448Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability. The system provides multiple sources, such as lasers or LEDs that are optically coupled to each capillary or channel. Multi-analyte capability, a variety of analysis modes and DNA sequencing operations are applications of systems using a plurality of lasers per channel.Type: GrantFiled: July 1, 1999Date of Patent: September 3, 2002Assignee: Corning Applied Technologies, Corp.Inventors: Paul Melman, Marvin Tabasky
-
Patent number: 6404495Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability. The system provides multiple sources, such as lasers or LEDs that are optically coupled to each capillary or channel. Multi-analyte capability, a variety of analysis modes and DNA sequencing operations are applications of systems using a plurality of lasers per channel.Type: GrantFiled: April 10, 2000Date of Patent: June 11, 2002Assignee: Corning Applied Technologies CorporationInventors: Paul Melman, Marvin Tabasky
-
Patent number: 6084667Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a micromachined substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability.Type: GrantFiled: January 21, 1998Date of Patent: July 4, 2000Assignee: NZ Applied TechnologiesInventors: Paul Melman, Marvin Tabasky
-
Patent number: 5903348Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a micromechanied substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability.Type: GrantFiled: March 12, 1997Date of Patent: May 11, 1999Assignee: NZ Applied Technologies, Inc.Inventors: Paul Melman, Marvin Tabasky
-
Patent number: 5436996Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal struutures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.Type: GrantFiled: September 28, 1994Date of Patent: July 25, 1995Assignee: GTE Laboratories IncorporatedInventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugasjaa
-
Patent number: 5285090Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.Type: GrantFiled: February 6, 1992Date of Patent: February 8, 1994Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Marvin Tabasky
-
Patent number: 5268066Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.Type: GrantFiled: December 30, 1992Date of Patent: December 7, 1993Assignee: GTE Laboratories IncorporatedInventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
-
Patent number: 5182782Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.Type: GrantFiled: January 7, 1992Date of Patent: January 26, 1993Assignee: GTE Laboratories IncorporatedInventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
-
Patent number: 5098862Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.Type: GrantFiled: November 7, 1990Date of Patent: March 24, 1992Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Marvin Tabasky
-
Patent number: 5021363Abstract: Method of forming conductive members on a substrate of GaAs. Silicon is placed on the substrate surface in the desired pattern of the conductive members. The substrate is exposed to a gaseous atmosphere containing WF.sub.6. WF.sub.6 is reduced by the silicon causing tungsten to selectively deposit on the silicon but not on the exposed GaAs. The substrate is given a rapid thermal annealing treatment which causes the silicon-tungsten elements to form conductive members having a silicon rich layer at the bottom, an intermediate tungsten silicide layer, and a tungsten rich layer at the top. The conductive members form ohmic contacts with underlying heavily doped GaAs and rectifying Schottky barrier contacts with underlying lightly doped GaAs.Type: GrantFiled: September 7, 1989Date of Patent: June 4, 1991Assignee: Laboratories IncorporatedInventors: Harry F. Lockwood, Margaret B. Stern, Marvin Tabasky, Victor Cataldo
-
Patent number: 4416055Abstract: Method of fabricating monolithic integrated circuit structure incorporating a bipolar transistor and a high value resistor. First and second N-type sectors are formed in an N-type epitaxial layer by junction isolation. A silicon oxide layer is formed on the surface of the body. The layer is thinner over a part of the first sector and over a part of the second sector. A layer of silicon nitride is formed on portions of the thinner silicon oxide to overlie predetermined zones within each sector. P-type conductivity imparting material is ion implanted through the unprotected thinner silicon oxide to form a low resistivity region in the first sector and two low resistivity regions in the second sector. The layer of silicon nitride overlying the predetermined zone in the second sector is removed, and an opening is formed over the predetermined zone in the second sector.Type: GrantFiled: December 4, 1981Date of Patent: November 22, 1983Assignee: GTE Laboratories IncorporatedInventors: Jeremiah P. McCarthy, Marvin Tabasky