Patents by Inventor Marvin Tabasky

Marvin Tabasky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6445448
    Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability. The system provides multiple sources, such as lasers or LEDs that are optically coupled to each capillary or channel. Multi-analyte capability, a variety of analysis modes and DNA sequencing operations are applications of systems using a plurality of lasers per channel.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: September 3, 2002
    Assignee: Corning Applied Technologies, Corp.
    Inventors: Paul Melman, Marvin Tabasky
  • Patent number: 6404495
    Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability. The system provides multiple sources, such as lasers or LEDs that are optically coupled to each capillary or channel. Multi-analyte capability, a variety of analysis modes and DNA sequencing operations are applications of systems using a plurality of lasers per channel.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: June 11, 2002
    Assignee: Corning Applied Technologies Corporation
    Inventors: Paul Melman, Marvin Tabasky
  • Patent number: 6084667
    Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a micromachined substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: July 4, 2000
    Assignee: NZ Applied Technologies
    Inventors: Paul Melman, Marvin Tabasky
  • Patent number: 5903348
    Abstract: A system for aligning the optical components of a chemical analysis system in which capillaries or optical fibers are supported by a micromechanied substrate. The system provides for alignment of elements of an electrophoresis system in an efficient high sampling rate capability.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: May 11, 1999
    Assignee: NZ Applied Technologies, Inc.
    Inventors: Paul Melman, Marvin Tabasky
  • Patent number: 5436996
    Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal struutures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: July 25, 1995
    Assignee: GTE Laboratories Incorporated
    Inventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugasjaa
  • Patent number: 5285090
    Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.
    Type: Grant
    Filed: February 6, 1992
    Date of Patent: February 8, 1994
    Assignee: GTE Laboratories Incorporated
    Inventors: Brian M. Ditchek, Marvin Tabasky
  • Patent number: 5268066
    Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: December 7, 1993
    Assignee: GTE Laboratories Incorporated
    Inventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
  • Patent number: 5182782
    Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.
    Type: Grant
    Filed: January 7, 1992
    Date of Patent: January 26, 1993
    Assignee: GTE Laboratories Incorporated
    Inventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
  • Patent number: 5098862
    Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.
    Type: Grant
    Filed: November 7, 1990
    Date of Patent: March 24, 1992
    Assignee: GTE Laboratories Incorporated
    Inventors: Brian M. Ditchek, Marvin Tabasky
  • Patent number: 5021363
    Abstract: Method of forming conductive members on a substrate of GaAs. Silicon is placed on the substrate surface in the desired pattern of the conductive members. The substrate is exposed to a gaseous atmosphere containing WF.sub.6. WF.sub.6 is reduced by the silicon causing tungsten to selectively deposit on the silicon but not on the exposed GaAs. The substrate is given a rapid thermal annealing treatment which causes the silicon-tungsten elements to form conductive members having a silicon rich layer at the bottom, an intermediate tungsten silicide layer, and a tungsten rich layer at the top. The conductive members form ohmic contacts with underlying heavily doped GaAs and rectifying Schottky barrier contacts with underlying lightly doped GaAs.
    Type: Grant
    Filed: September 7, 1989
    Date of Patent: June 4, 1991
    Assignee: Laboratories Incorporated
    Inventors: Harry F. Lockwood, Margaret B. Stern, Marvin Tabasky, Victor Cataldo
  • Patent number: 4416055
    Abstract: Method of fabricating monolithic integrated circuit structure incorporating a bipolar transistor and a high value resistor. First and second N-type sectors are formed in an N-type epitaxial layer by junction isolation. A silicon oxide layer is formed on the surface of the body. The layer is thinner over a part of the first sector and over a part of the second sector. A layer of silicon nitride is formed on portions of the thinner silicon oxide to overlie predetermined zones within each sector. P-type conductivity imparting material is ion implanted through the unprotected thinner silicon oxide to form a low resistivity region in the first sector and two low resistivity regions in the second sector. The layer of silicon nitride overlying the predetermined zone in the second sector is removed, and an opening is formed over the predetermined zone in the second sector.
    Type: Grant
    Filed: December 4, 1981
    Date of Patent: November 22, 1983
    Assignee: GTE Laboratories Incorporated
    Inventors: Jeremiah P. McCarthy, Marvin Tabasky