Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.

Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.

Abstract: Semiconductor component comprising: a silicon containing layer (1), at least one graphene layer (3, 3?, 3?, 3?41 ), and a functional layer (2, 2?, 2?, 2??) between the silicon containing layer (1) and the graphene layer (3, 3?, 3?, 3??), wherein the at least one graphene layer (3?, 3?, 3??) is deposited directly on the functional layer (2, 2?, 2?, 2??) to form a layer system (6, 6?, 6?, 6??) with the functional layer (2, 2?, 2?, 2??) , and the functional layer (2, 2?, 2?, 2??) includes at least one dielectric material having a dielectric constant k in a range between K=3 to K=400, and a conductance of the functional layer (2, 2?, 2?, 2??) in the layer system (6, 6?, 6?, 6??) is below a conductance of the graphene layer (3, 3?, 3?, 3??).