Abstract: A system for reducing electromagnetic interference emissions is described. The system can include a network interface card with an Ethernet controller circuit. The Ethernet controller circuit generates an Ethernet output signal that includes a pre-emphasis component and a data component. The Ethernet controller circuit monitors the Ethernet output signal and adjusts the levels of the pre-emphasis component and the data component to reduce the electromagnetic interference caused by the network interface card but still fit the requirements for valid Ethernet signals.

Abstract: NMOS transistor buffers are used to buffer the output of a system. The system can include a network interface card. The NMOS transistor buffers receive the output of the shaped Ethernet data signals and drive a transformer. The NMOS transistor buffers allow for low power consumption while a feedback monitoring system provides stability by controlling the inputs to the NMOS transistors.

Abstract: A system for reducing electromagnetic interference emissions is described. The system can include a network interface card with an Ethernet controller circuit. The Ethernet controller circuit uses a pair of programmable digital to analog converters to generate an Ethernet output signal that includes a pre-emphasis component and a data component. The Ethernet controller circuit monitors the Ethernet output signal and adjust the levels of the pre-emphasis component and the data component by adjusting the values to the digital to analog converters. By making these adjustments, the system reduces the electromagnetic interference caused by the network interface card but maintains valid Ethernet signals.

Abstract: One embodiment of the invention includes a transformer that is at least partially formed on a substrate. The transformer is for electrical isolation and signal filtering. The transformer includes the following elements. A portion of the substrate has two holes through the substrate. A ferrite core is formed in a loop through the two holes. A primary winding is made of a first metal trace. The first metal trace is formed in a spiral around one hole. The first metal trace has at least two primary terminals acting as an input to the transformer. The transformer also includes a secondary winding. The secondary winding is made of a second metal trace. The second metal trace is formed in a spiral around the other hole. The second metal trace has at least two secondary terminals acting as an output from the transformer.

Abstract: A system comprising the following elements. An ethernet controller circuit for generating ethernet data signals. An isolation circuit coupled to receive the ethernet data signals and for generating ethernet output signals. The ethernet output signals including primarily a first sine wave signal, a second sign wave signal, and a set of signals. The first sine wave signal is at a frequency approximately equal to the frequency of the ethernet data signals. The second sine wave signal is at a frequency approximately one half the frequency of the first sine wave signal. The third set of signals is for transitioning between said first sine wave signal and said second sine wave signal. In this embodiment, the high frequency components of the output signals is significantly reduced, which results in reduced electromagnetic interference from the system.

Abstract: A current-controlled oscillator with first and second differential comparators (640, 840) serving as inputs, first and second voltage independent multi-layered integrated capacitors (600, 800) corresponding to the first and second comparators (640, 840), and a RS latch (700) for switching operation between the two comparators (640, 840) thereby achieving oscillation. The multi-layered integrated capacitors (600, 800) are designed to provide voltage independent capacitance.

Abstract: A controlled voltage or current source comprises a first CMOS active voltage divider, which generates a first reference voltage at a first reference node as a first function of temperature, and a second CMOS active voltage divider, which generates a second reference voltage at a second reference node as a second function of temperature. A CMOS difference amplifier, generates the controlled voltage as a function of the difference between the first reference voltage and the second voltage reference, and of a third function of temperature. A final amplifier stage offsets changes in the source voltage. In another aspect, temperature compensated NAND and NOR gates are provided using the controlled voltage source.