Abstract: A receiver is used with third code blocks based on first code blocks, second code blocks, and a planning code block. The first code blocks are associated with a first sequence number and modulated with a first modulation scheme. The second code blocks are associated with a second sequence number and modulated with a second modulation scheme. The planning code block associates the third code blocks with the first code blocks and the second code blocks. The receiver includes a de-multiplexing portion, which includes a code block selector and a look up table, that outputs a de-multiplexed signal based on the third code blocks. The code block selector selects a code block from the third code blocks to output as the de-multiplexed signal based on entries in the look up table. The receiver also includes a recovery portion that outputs received code blocks based on the de-multiplexed signal.

Abstract: A receiver is used with third code blocks based on first code blocks, second code blocks, and a planning code block. The first code blocks are associated with a first sequence number and modulated with a first modulation scheme. The second code blocks are associated with a second sequence number and modulated with a second modulation scheme. The planning code block associates the third code blocks with the first code blocks and the second code blocks. The receiver includes a de-multiplexing portion, which includes a code block selector and a look up table, that outputs a de-multiplexed signal based on the third code blocks. The code block selector selects a code block from the third code blocks to output as the de-multiplexed signal based on entries in the look up table. The receiver also includes a recovery portion that outputs received code blocks based on the de-multiplexed signal.

Abstract: A receiver is used with third code blocks based on first code blocks, second code blocks, and a planning code block. The first code blocks are associated with a first sequence number and modulated with a first modulation scheme. The second code blocks are associated with a second sequence number and modulated with a second modulation scheme. The planning code block associates the third code blocks with the first code blocks and the second code blocks. The receiver includes a de-multiplexing portion, which includes a code block selector and a look up table, that outputs a de-multiplexed signal based on the third code blocks. The code block selector selects a code block from the third code blocks to output as the de-multiplexed signal based on entries in the look up table. The receiver also includes a recovery portion that outputs received code blocks based on the de-multiplexed signal.

Abstract: An apparatus for a dual mode low density parity check (LDPC) decoder including edge random access memory (RAM), last-in-first-out/first-in-first-out (LIFO/FIFO) RAM, channel RAM, and parallel datapath engines, where the datapath engines include a standard belief propagation decoding (SBD) datapath and a layered belief propagation decoding (LBD) datapath, where the SBD datapath includes a shifter, an accumulator, multiplexers, and a g( )_sbd calculator, and where the LBD datapath includes the shifter, the multiplexers, and a g?( )_lbd calculator.

Abstract: An apparatus for a dual mode low density parity check (LDPC) decoder including edge random access memory (RAM), last-in-first-out/first-in-first-out (LIFO/FIFO) RAM, channel RAM, and parallel datapath engines, where the datapath engines include a standard belief propagation decoding (SBD) datapath and a layered belief propagation decoding (LBD) datapath, where the SBD datapath includes a shifter, an accumulator, multiplexers, and a g( )_sbd calculator, and where the LBD datapath includes the shifter, the multiplexers, and a g?( )_lbd calculator.

Abstract: A receiver is used with third code blocks based on first code blocks, second code blocks, and a planning code block. The first code blocks are associated with a first sequence number and modulated with a first modulation scheme. The second code blocks are associated with a second sequence number and modulated with a second modulation scheme. The planning code block associates the third code blocks with the first code blocks and the second code blocks. The receiver includes a de-multiplexing portion, which includes a code block selector and a look up table, that outputs a de-multiplexed signal based on the third code blocks. The code block selector selects a code block from the third code blocks to output as the de-multiplexed signal based on entries in the look up table. The receiver also includes a recovery portion that outputs received code blocks based on the de-multiplexed signal.

Abstract: A data processing apparatus simultaneously sorts n input data words into a sorted list of m list entries. The apparatus includes a pre-sorting network sorting the n input data words and a sorting network storing up to m list entries and storing respective input data words into the m list entries. The pre-sorting network includes a set of comparators for each unique pair of input data words, and a set of n multiplexers outputting a selected one of the n input data words, and a decoder circuit controlling the multiplexers responsive to the comparisons. The sorting network includes m basic units storing current list entries ordered from greatest to least. Each cycle the basic units selecting for storage the current list entry, a current list entry of a basic units storing greater list entries or one of the input data words.