Patents by Inventor Marwan Adel Khalaf

Marwan Adel Khalaf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Generation of sub-netlists for use in incremental compilation
    Patent number: 6490717
    Abstract: A technique is disclosed for performing an incremental recompile of an electronic design that has been previous compiled and then changed by a designer. This is accomplished by identifying a “sub-netlist” within the larger netlist of the changed design. The sub-netlist contains the sphere of influence of the designer's changes to the original design. During incremental recompile, only the sub-netlist is compiled; the remainder of the netlist is left as is from the previous compile. After the sub-netlist is synthesized, it is integrated back into the synthesized netlist from the previous compilation. The newly synthesized netlist for the changed design is mapped to logic cells which are then fit onto a target hardware device.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: December 3, 2002
    Assignee: Altera Corporation
    Inventors: Bruce Pedersen, Francis B. Heile, Marwan Adel Khalaf, David Wolk Mendel
  • Generation of sub-netlists for use in incremental compilation
    Patent number: 6134705
    Abstract: A technique is disclosed for performing an incremental recompile of an electronic design that has been previous compiled and then changed by a designer. This is accomplished by identifying a "sub-netlist" within the larger netlist of the changed design. The sub-netlist contains the sphere of influence of the designer's changes to the original design. During incremental recompile, only the sub-netlist is compiled; the remainder of the netlist is left as is from the previous compile. After the sub-netlist is synthesized, it is integrated back into the synthesized netlist from the previous compilation. The newly synthesized netlist for the changed design is mapped to logic cells which are then fit onto a target hardware device.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: October 17, 2000
    Assignee: Altera Corporation
    Inventors: Bruce Pedersen, Francis B. Heile, Marwan Adel Khalaf, David Wolk Mendel