Patents by Inventor Mary Annie Cheong
Mary Annie Cheong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9842792Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. The, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.Type: GrantFiled: January 27, 2016Date of Patent: December 12, 2017Assignee: UTAC HEADQUARTERS PTE. LTD.Inventors: Danny Retuta, Hien Boon Tan, Anthony Yi Sheng Sun, Mary Annie Cheong
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Publication number: 20160211196Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. The, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.Type: ApplicationFiled: January 27, 2016Publication date: July 21, 2016Applicant: UNITED TEST AND ASSEMBLY CENTER LTD.Inventors: Danny RETUTA, Hien Boon TAN, Anthony Yi Sheng SUN, Mary Annie CHEONG
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Patent number: 9281218Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. Then, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.Type: GrantFiled: August 29, 2007Date of Patent: March 8, 2016Assignee: UNITED TEST AND ASSEMBLY CENTER LTD.Inventors: Danny Retuta, Hien Boon Tan, Anthony Yi Sheng Sun, Mary Annie Cheong
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Patent number: 8030768Abstract: A semiconductor package with a semiconductor chip having under bump metallizations (UBMs) on a first surface and a substrate having open vias. The substrate is attached to the semiconductor chip with the UBMs in alignment with the open vias. An encapsulant surrounds the semiconductor chip and the substrate and a conductor fills the open vias to form external package connections.Type: GrantFiled: April 24, 2008Date of Patent: October 4, 2011Assignee: United Test And Assembly Center Ltd.Inventors: Roel Robles, Danny Retuta, Mary Annie Cheong, Hien Boon Tan, Anthony Yi Sheng Sun, Richard Gan
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Patent number: 7723833Abstract: A stacked die semiconductor package that includes a substrate with a plurality of adhesive portions arranged in a manner to create at least one gap between the adhesive portions. The package also includes a first semiconductor chip having a non-active surface in contact with the adhesive portions, and an active surface being electrically connected to the substrate. In the package, a second semiconductor chip the non-active surface of the second semiconductor chip is attached to the non-active surface of the first semiconductor chip by a layer of adhesive therebetween. The active surface of the second semiconductor chip is electrically connected to the substrate. An encapsulant material covers the first and second semiconductor chips and their associated electrical connections. The encapsulating material fills the at least one gap between the plurality of adhesive portions and thereby encapsulates the second semiconductor chip and its associated electrical connection.Type: GrantFiled: August 29, 2007Date of Patent: May 25, 2010Assignee: United Test and Assembly Center Ltd.Inventors: Gaurav Mehta, Hien Boon Tan, Susanto Tanary, Mary Annie Cheong, Anthony Yi Sheng Sun, Chuen Khiang Wang
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Publication number: 20080284015Abstract: A semiconductor package with a semiconductor chip having under bump metallizations (UBMs) on a first surface and a substrate having open vias. The substrate is attached to the semiconductor chip with the UBMs in alignment with the open vias. An encapsulant surrounds the semiconductor chip and the substrate and a conductor fills the open vias to form external package connections. A method of forming a semiconductor package having external package connections includes providing a semiconductor chip having under bump metallizations (UBMs) on a first surface; attaching the first surface of the semiconductor chip to a substrate, the UBMs of the semiconductor chip being in alignment with open vias formed in the substrate; encapsulating the semiconductor chip and the substrate; and filling with open vias with a conductor to form the external package connections.Type: ApplicationFiled: April 24, 2008Publication date: November 20, 2008Inventors: Roel Robles, Danny Retuta, Mary Annie Cheong, Hien Boon Tan, Anthony Yi Sheng Sun, Richard Gan
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Publication number: 20080061414Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. Then, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.Type: ApplicationFiled: August 29, 2007Publication date: March 13, 2008Applicant: United Test and Assembly Center Ltd.Inventors: Danny RETUTA, Hien Boon Tan, Anthony Sun, Mary Annie Cheong
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Publication number: 20080054435Abstract: A stacked die semiconductor package that includes a substrate with a plurality of adhesive portions arranged in a manner to create at least one gap between the adhesive portions. The package also includes a first semiconductor chip having a non-active surface in contact with the adhesive portions, and an active surface being electrically connected to the substrate. In the package, a second semiconductor chip the non-active surface of the second semiconductor chip is attached to the non-active surface of the first semiconductor chip by a layer of adhesive therebetween. The active surface of the second semiconductor chip is electrically connected to the substrate. An encapsulant material covers the first and second semiconductor chips and their associated electrical connections. The encapsulating material fills the at least one gap between the plurality of adhesive portions and thereby encapsulates the second semiconductor chip and its associated electrical connection.Type: ApplicationFiled: August 29, 2007Publication date: March 6, 2008Applicant: United Test and Assembly Center, Ltd.Inventors: Gaurav MEHTA, Hien Boon Tan, Susanto Tanary, Mary Annie Cheong, Anthony Sun, Chuen Wang