Patents by Inventor Mary EDMONDS
Mary EDMONDS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10553425Abstract: Embodiments described herein provide a self-limiting and saturating Si—Ox bilayer process which does not require the use of a plasma or catalyst and that does not lead to undesirable substrate oxidation. Methods of the disclosure do not produce SiO2, but instead produce a saturated Si—Ox film with —OH termination to make substrate surfaces highly reactive towards metal ALD precursors to seed high nucleation and growth of gate oxide ALD materials.Type: GrantFiled: September 25, 2017Date of Patent: February 4, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Jessica S. Kachian, Naomi Yoshida, Mei Chang, Mary Edmonds, Andrew C. Kummel, Sang Wook Park, Hyunwoong Kim
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Patent number: 10373824Abstract: Methods for depositing silicon include cycling dosing between 1 and 100 cycles of one or more first chlorosilane precursors on a III-V surface at a temperature between 300° C. and 500° C. to form a first layer. Methods may include desorbing chlorine from the first layer by treating the first layer with atomic hydrogen to form a second layer. Methods may include forming a silicon multilayer on the second layer by cycling dosing between 1 and 100 cycles of one or more second chlorosilane precursors and atomic hydrogen at a temperature between 300° C. and 500° C. A layered composition includes a first layer selected from the group consisting of InxGa1?xAs, InxGa1?xSb, InxGa1?xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: GrantFiled: October 6, 2017Date of Patent: August 6, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Andrew C. Kummel, Mary Edmonds, Mei Chang, Jessica S. Kachian
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Patent number: 10297441Abstract: Methods of the disclosure include a BN ALD process at low temperatures using a reactive nitrogen precursor, such as thermal N2H4, and a boron containing precursor, which allows for the deposition of ultra thin (less than 5 nm) films with precise thickness and composition control. Methods are self-limiting and provide saturating atomic layer deposition (ALD) of a boron nitride (BN) layer on various semiconductors and metallic substrates.Type: GrantFiled: August 10, 2017Date of Patent: May 21, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Steven Wolf, Mary Edmonds, Andrew C. Kummel, Srinivas D. Nemani, Ellie Y. Yieh
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Patent number: 10262858Abstract: Embodiments described herein relate to semiconductor and metal substrate surface preparation and controlled growth methods. An example application is formation of an atomic layer deposition (ALD) control layer as a diffusion barrier or gate dielectric layer and subsequent ALD processing. Embodiments described herein are believed to be advantageously utilized concerning gate oxide deposition, diffusion barrier deposition, surface functionalization, surface passivation, and oxide nucleation, among other processes. More specifically, embodiments described herein provide for silicon nitride ALD processes which functionalize, passivate, and nucleate a SiNx monolayer at temperatures below about 300° C.Type: GrantFiled: April 25, 2017Date of Patent: April 16, 2019Assignees: Applied Materials, Inc., The Regents of the University of CaliforniaInventors: Naomi Yoshida, Lin Dong, Andrew Kummel, Jessica Kachian, Mary Edmonds, Steve Wolf
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Publication number: 20180040476Abstract: Methods of the disclosure include a BN ALD process at low temperatures using a reactive nitrogen precursor, such as thermal N2H4, and a boron containing precursor, which allows for the deposition of ultra thin (less than 5 nm) films with precise thickness and composition control. Methods are self-limiting and provide saturating atomic layer deposition (ALD) of a boron nitride (BN) layer on various semiconductors and metallic substrates.Type: ApplicationFiled: August 10, 2017Publication date: February 8, 2018Inventors: Steven WOLF, Mary EDMONDS, Andrewe KUMMEL, Srinivas NEMANI, Ellie YIEH
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Publication number: 20180033610Abstract: Methods for depositing silicon include cycling dosing between 1 and 100 cycles of one or more first chlorosilane precursors on a III-V surface at a temperature between 300° C. and 500° C. to form a first layer. Methods may include desorbing chlorine from the first layer by treating the first layer with atomic hydrogen to form a second layer. Methods may include forming a silicon multilayer on the second layer by cycling dosing between 1 and 100 cycles of one or more second chlorosilane precursors and atomic hydrogen at a temperature between 300° C. and 500° C. A layered composition includes a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: ApplicationFiled: October 6, 2017Publication date: February 1, 2018Inventors: Andrew C. KUMMEL, Mary EDMONDS, Mei CHANG, Jessica S. KACHIAN
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Publication number: 20180019116Abstract: Embodiments described herein provide a self-limiting and saturating Si—Ox bilayer process which does not require the use of a plasma or catalyst and that does not lead to undesirable substrate oxidation. Methods of the disclosure do not produce SiO2, but instead produce a saturated Si—Ox film with —OH termination to make substrate surfaces highly reactive towards metal ALD precursors to seed high nucleation and growth of gate oxide ALD materials.Type: ApplicationFiled: September 25, 2017Publication date: January 18, 2018Inventors: Jessica S. KACHIAN, Naomi YOSHIDA, Mei CHANG, Mary EDMONDS, Andrew C. KUMMEL, Sang Wook PARK, Hyunwoong KIM
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Patent number: 9824889Abstract: Methods for depositing silicon include cycling dosing between 1 and 100 cycles of one or more first chlorosilane precursors on a III-V surface at a temperature between 300° C. and 500° C. to form a first layer. Methods may include desorbing chlorine from the first layer by treating the first layer with atomic hydrogen to form a second layer. Methods may include forming a silicon multilayer on the second layer by cycling dosing between 1 and 100 cycles of one or more second chlorosilane precursors and atomic hydrogen at a temperature between 300° C. and 500° C. A layered composition includes a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: GrantFiled: April 15, 2015Date of Patent: November 21, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Andrew C. Kummel, Mary Edmonds, Mei Chang, Jessica S. Kachian
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Publication number: 20170309479Abstract: Embodiments described herein relate to semiconductor and metal substrate surface preparation and controlled growth methods. An example application is formation of an atomic layer deposition (ALD) control layer as a diffusion barrier or gate dielectric layer and subsequent ALD processing. Embodiments described herein are believed to be advantageously utilized concerning gate oxide deposition, diffusion barrier deposition, surface functionalization, surface passivation, and oxide nucleation, among other processes. More specifically, embodiments described herein provide for silicon nitride ALD processes which functionalize, passivate, and nucleate a SiNx monolayer at temperatures below about 300° C.Type: ApplicationFiled: April 25, 2017Publication date: October 26, 2017Inventors: Naomi YOSHIDA, Lin DONG, Andrew KUMMEL, Jessica KACHIAN, Mary EDMONDS, Steve WOLF
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Patent number: 9773663Abstract: Embodiments described herein provide a self-limiting and saturating Si—Ox bilayer process which does not require the use of a plasma or catalyst and that does not lead to undesirable substrate oxidation. Methods of the disclosure do not produce SiO2, but instead produce a saturated Si—Ox film with —OH termination to make substrate surfaces highly reactive towards metal ALD precursors to seed high nucleation and growth of gate oxide ALD materials.Type: GrantFiled: August 5, 2016Date of Patent: September 26, 2017Assignees: Applied Materials, Inc., The Regents of the University of CaliforniaInventors: Jessica S. Kachian, Naomi Yoshida, Mei Chang, Mary Edmonds, Andrew C. Kummel, Sang Wook Park, Hyunwoong Kim
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Patent number: 9607920Abstract: Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: GrantFiled: March 4, 2016Date of Patent: March 28, 2017Assignees: APPLIED MATERIALS, INC., The Regents of the University of CaliforniaInventors: Mary Edmonds, Andrew C. Kummel, Atif M. Noori
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Publication number: 20170040158Abstract: The present disclosure provides for semiconductor fabrication processes that include atomic layer depositions. Embodiments described herein provide for formation of a diffusion barrier or gate dielectric layer in preparation for subsequent ALD on semiconductor surfaces. More specifically, embodiments of the present disclosure provide for the formation of fin field effect transistor (FinFET) and metal oxide semiconductor field effect transistor (MOSFET) devices utilizing improved ALD processes.Type: ApplicationFiled: August 5, 2016Publication date: February 9, 2017Inventors: Jessica S. KACHIAN, Naomi YOSHIDA, Mei CHANG, Andrew C. KUMMEL, Mary EDMONDS
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Publication number: 20170040159Abstract: Embodiments described herein provide a self-limiting and saturating Si—Ox bilayer process which does not require the use of a plasma or catalyst and that does not lead to undesirable substrate oxidation. Methods of the disclosure do not produce SiO2, but instead produce a saturated Si—Ox film with —OH termination to make substrate surfaces highly reactive towards metal ALD precursors to seed high nucleation and growth of gate oxide ALD materials.Type: ApplicationFiled: August 5, 2016Publication date: February 9, 2017Inventors: Jessica S. KACHIAN, Naomi YOSHIDA, Mei CHANG, Mary EDMONDS, Andrew C. KUMMEL, Sang Wook PARK, Hyunwoong KIM
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Publication number: 20160190030Abstract: Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: ApplicationFiled: March 4, 2016Publication date: June 30, 2016Inventors: Mary EDMONDS, Andrew C. KUMMEL, Atif M. NOORI
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Patent number: 9305780Abstract: Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: GrantFiled: December 5, 2014Date of Patent: April 5, 2016Assignees: APPLIED MATERIALS, INC., THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Mary Edmonds, Andrew C. Kummel, Atif M. Noori
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Publication number: 20150303058Abstract: Methods for depositing silicon include cycling dosing between 1 and 100 cycles of one or more first chlorosilane precursors on a III-V surface at a temperature between 300° C. and 500° C. to form a first layer. Methods may include desorbing chlorine from the first layer by treating the first layer with atomic hydrogen to form a second layer. Methods may include forming a silicon multilayer on the second layer by cycling dosing between 1 and 100 cycles of one or more second chlorosilane precursors and atomic hydrogen at a temperature between 300° C. and 500° C. A layered composition includes a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: ApplicationFiled: April 15, 2015Publication date: October 22, 2015Inventors: Andrew C. KUMMEL, Mary EDMONDS, Mei CHANG, Jessica S. KACHIAN
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Publication number: 20150162182Abstract: Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.Type: ApplicationFiled: December 5, 2014Publication date: June 11, 2015Inventors: Mary EDMONDS, Andrew C. KUMMEL, Atif M. NOORI