Abstract: A format varying computing system including a computer linked to a display and input device, the computer including memory devices linked to a processing unit and a set of counters residing in the processing unit and linked to the memory devices, the set of counters defining a symbol residing in the memory devices.

Abstract: A system and method is presented for simultaneous processing of information by providing a matrix having numerous cells, each of which has at least one processor and pages having a combination of format counters, data pointers and process counters. The cells may be connected to an area of random access memory, which is addressable, with the connection being dynamically re-allocable to other areas of random access memory. Instructions and registers are located in random access memory areas. The cells can process information addressable over one or more networks, including without limitation the Internet, executing instructions pointed to by at least one process counter.

Abstract: A format varying computing system including a computer linked to a display and input device, the computer including memory devices linked to a processing unit and a set of counters residing in the processing unit and linked to the memory devices, the set of counters defining a symbol residing in the memory devices.