Patents by Inventor Mary Wisniewski

Mary Wisniewski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7346470
    Abstract: A system and method is disclosed for assessing a probability of failure of operation of a semiconductor wafer. The method includes inputting risk factor data into a memory and inputting a plurality of wafers into a semiconductor fabrication manufacturing process. A subset of wafers is selected to obtain a sample population and at least one region of each wafer of the sample population is inspected. Circuit design data associated with each wafer of the sample population is obtained and one or more defects that present an increased risk to the operation of a particular wafer are identified. The identification is a function of the risk factor data, the inspecting step and the circuit design data. A probability of semiconductor wafer failure is calculated.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: March 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Mary Wisniewski, Emmanuel Yashchin, Christina Landers, Asya Takken, Brian Trapp
  • Publication number: 20050120108
    Abstract: A communication system including a database adapted to store communication tag information; and a database agent. The database agent is adapted to determine if a communication has a task tag. The database agent is adapted to transfer predetermined communication tag information of the task tag of the communication to the database. The database agent is adapted to automatically send a communication based upon information stored in the predetermined communication tag information.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 2, 2005
    Inventors: Robert Wisniewski, Mary Wisniewski
  • Publication number: 20040254752
    Abstract: A system and method is disclosed for assessing a probability of failure of operation of a semiconductor wafer. The method includes inputting risk factor data into a memory and inputting a plurality of wafers into a semiconductor fabrication manufacturing process. A subset of wafers is selected to obtain a sample population and at least one region of each wafer of the sample population is inspected. Circuit design data associated with each wafer of the sample population is obtained and one or more defects that present an increased risk to the operation of a particular wafer are identified. The identification is a function of the risk factor data, the inspecting step and the circuit design data. A probability of semiconductor wafer failure is calculated.
    Type: Application
    Filed: June 10, 2003
    Publication date: December 16, 2004
    Applicant: International Business Machines Corporation
    Inventors: Mary Wisniewski, Emmanuel Yashchin, Christina Landers, Asya Takken, Brian Trapp