Patents by Inventor Masaaki Atobe

Masaaki Atobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4607377
    Abstract: Optimum tap coefficients corresponding to equalization characteristics are stored in a memory circuit and when an equalization characteristics is designated, an optimum tap coefficient is read out of the memory circuit and a transversal type equalizer is controlled by the read-out optimum tap coefficient. According to a modified embodiment, where a tap coefficient for a combined characteristic based on a combination of a plurality of transmission characteristics is necessary, a convolution operation of the tap coefficients for respective transmission characteristics is effected to determine a new tap coefficient which is used to set taps of the transversal type equalizer.
    Type: Grant
    Filed: April 25, 1984
    Date of Patent: August 19, 1986
    Assignee: NEC Corporation
    Inventors: Masaaki Atobe, Susumu Otani
  • Patent number: 4591797
    Abstract: A PSK demodulator is disclosed. The demodulator includes a voltage controlled oscillator response to a control circuit in a frequency converter for converting an input PSK signal as a function of the output of the voltage controlled oscillator. A carrier recovery circuit recovers a carrier wave from the output of the frequency converter means and applies the recovered output to a band-pass filter. A phase detector detects the output of the frequency converter as a function of the output of the band-pass filter and provides a demodulated signal and function thereof. A phase comparator is provided for detecting the phase difference between the input and output signals of the band-pass filter and a low-pass filter responsive to the output of the phase comparator provides the control signal.
    Type: Grant
    Filed: March 21, 1985
    Date of Patent: May 27, 1986
    Assignee: NEC Corporation
    Inventors: Yoshio Tanimoto, Masaaki Atobe
  • Patent number: 4570127
    Abstract: An AGC circuit for amplifying burst signals has output power which does not vary, regardless of variations in the burst time. This automatic gain control (AGC) circuit has an amplifier for receiving a burst signal input and providing an amplified burst output. The level of amplification is controlled in response to a control signal applied to the amplifier. A negative feedback circuit includes an envelope detector for receiving the burst output and a circuit for providing a comparison signal in response to a comparison between the voltage leads of the detected envelope signal and a reference voltage. The comparison signal is converted into a binary signal which is counted down to provide the amplifier control signal.
    Type: Grant
    Filed: January 9, 1984
    Date of Patent: February 11, 1986
    Assignee: NEC Corporation
    Inventors: Yoshio Tanimoto, Masaaki Atobe
  • Patent number: 4525676
    Abstract: A system for demodulation of phase shift keying signals with a bandpass filter tracked to input carrier frequency variation. This system provides means for detecting phase variations in the regenerated carrier wave from the demodulated signal, and means for controlling the phase of the regenerated carrier wave to compensate for the demodulation error owing to input carrier frequency variation.
    Type: Grant
    Filed: February 22, 1982
    Date of Patent: June 25, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Masaaki Atobe, Yoshimi Tagashira
  • Patent number: 4488296
    Abstract: In a time division multiple access system comprising a central station and a plurality of substations, a subsidiary analog signal is sampled at a sampling circuit of each substation M times during each frame period to produce a succession of sampled pulses. A group of M sampled pulses is located by a substation delay circuit in each up-link burst assigned to each substation. Responsive to an up-link succession including each up-link burst, the central station reproduces the sampled pulse group from each up-link burst into a reproduced group of M reproduced pulses by central station sampling pulses synchronized with the M sampled pulses. The M reproduced pulses are rearranged by a central station delay circuit into sampled pulse reproductions appearing M times in each frame period. The sampled pulse reproductions are desampled into the subsidiary signal. The number of M may be equal to or greater than one.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: December 11, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kazuhiro Yamamoto, Masaaki Atobe
  • Patent number: 4483000
    Abstract: In an electronic circuit comprising a modulator (35) and used in each substation of a TDMA system and responsive to a baseband data signal sequence for producing a burst in accordance with a first burst control pulse, spurious components resulting in the burst from the first burst control pulse are eliminated either by allowing the data sequence to pass through a low-pass filter (36) after switching (45) the sequence by the first burst control pulse or by filtering the first burst control pulse by a low-pass filter before switching a local oscillation signal by the first control pulse. An additional switching circuit may switch either a modulated signal supplied from the modulator or the local oscillation signal in response to a second burst control pulse that disappears after extinction of the first burst control pulse.
    Type: Grant
    Filed: January 11, 1982
    Date of Patent: November 13, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kazuhiro Yamamoto, Masaaki Atobe
  • Patent number: 4479099
    Abstract: A 2.sup.N -phase phase modulator is formed from a plurality of series-connected 2-phase phase modulators. Each of the 2-phase phase modulators includes an Exclusive OR gate receiving at one input terminal one of a plurality of digital data sets. The first phase modulator receives a carrier signal at its other input terminal, and all subsequent phase modulators receive an output from a previous phase modulator through a 1/2 frequency divider.
    Type: Grant
    Filed: May 4, 1982
    Date of Patent: October 23, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Masaaki Atobe
  • Patent number: 3967220
    Abstract: A variable delay equalizer comprises two directional couplers, each having a pair of input terminals and a pair of output terminals. A pair of variable phase shifters are inserted respectively between the output terminals of the first coupler and the input terminals of the second coupler. A third variable phase shifter is connected between the second output terminal of the second coupler and the second input terminal of the first coupler. This equalizer makes it possible to shift the peak delay frequency as well as to change the value of the peak delay itself.
    Type: Grant
    Filed: July 31, 1975
    Date of Patent: June 29, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yoshimi Tagashira, Masaaki Atobe, Kazuhiro Yamamoto