Patents by Inventor Masaaki Harazono
Masaaki Harazono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10602622Abstract: A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer, insulating particles contained in the first and second insulating layers at rate of 40 to 80 wt %, a first wiring conductor on a first underlying metal layer surface, and a second wiring conductor on a second underlying metal layer surface. A second level difference of the unevenness in a surface region of the second insulating layer under the second wiring conductor is smaller than a first level difference of the unevenness in a surface region of the first insulating layer under the first wiring conductor, and the second level difference is not more than ? of an average particle size of the insulating particles.Type: GrantFiled: September 13, 2018Date of Patent: March 24, 2020Assignee: KYOCERA CorporationInventors: Masaaki Harazono, Takayuki Umemoto, Hidetoshi Yugawa
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Patent number: 10306769Abstract: A wiring board includes an insulating layer made of an insulating resin containing inorganic insulating particles, a groove positioned in a surface of the insulating layer and including a wall surface being perpendicular to the surface of the insulating layer, and a wiring conductor filled in the groove, wherein a cross-section of the insulating resin and cross-sections of the inorganic insulating particles are exposed at the wall surface in flush with each other.Type: GrantFiled: September 26, 2017Date of Patent: May 28, 2019Assignee: KYOCERA CORPORATIONInventors: Masaaki Harazono, Takayuki Umemoto
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Publication number: 20190132962Abstract: A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer, insulating particles contained in the first and second insulating layers at rate of 40 to 80 wt %, a first wiring conductor on a first underlying metal layer surface, and a second wiring conductor on a second underlying metal layer surface. A second level difference of the unevenness in a surface region of the second insulating layer under the second wiring conductor is smaller than a first level difference of the unevenness in a surface region of the first insulating layer under the first wiring conductor, and the second level difference is not more than ? of an average particle size of the insulating particles.Type: ApplicationFiled: September 13, 2018Publication date: May 2, 2019Applicant: KYOCERA CorporationInventors: Masaaki Harazono, Takayuki Umemoto, Hidetoshi Yugawa
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Patent number: 10172235Abstract: A wiring board includes a laminate in which at least one first insulating layer containing first insulating particles and a first insulating resin, and at least one second insulating layer containing second insulating particles having a particle size smaller than a particle size of the first insulating particles and a second insulating resin are alternately positioned; a groove for wiring positioned at least on an upper surface of the laminate and including a side surface and a bottom surface; a via hole positioned in the first insulating layer of the laminate; and a wiring conductor positioned in the groove for wiring and in the via hole. The bottom surface of the groove for wiring is positioned in the second insulating layer.Type: GrantFiled: June 5, 2018Date of Patent: January 1, 2019Assignee: KYOCERA CORPORATIONInventor: Masaaki Harazono
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Publication number: 20180376589Abstract: A wiring board includes a laminate in which at least one first insulating layer containing first insulating particles and a first insulating resin, and at least one second insulating layer containing second insulating particles having a particle size smaller than a particle size of the first insulating particles and a second insulating resin are alternately positioned; a groove for wiring positioned at least on an upper surface of the laminate and including a side surface and a bottom surface; a via hole positioned in the first insulating layer of the laminate; and a wiring conductor positioned in the groove for wiring and in the via hole. The bottom surface of the groove for wiring is positioned in the second insulating layer.Type: ApplicationFiled: June 5, 2018Publication date: December 27, 2018Applicant: KYOCERA CorporationInventor: Masaaki HARAZONO
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Publication number: 20180146558Abstract: A wiring board includes an insulating layer made of an insulating resin containing inorganic insulating particles, a groove positioned in a surface of the insulating layer and including a wall surface being perpendicular to the surface of the insulating layer, and a wiring conductor filled in the groove, wherein a cross-section of the insulating resin and cross-sections of the inorganic insulating particles are exposed at the wall surface in flush with each other.Type: ApplicationFiled: September 26, 2017Publication date: May 24, 2018Applicant: KYOCERA CorporationInventors: Masaaki HARAZONO, Takayuki UMEMOTO
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Patent number: 9913372Abstract: The wiring board of the present disclosure includes an insulating layer, and a wiring conductor existing so as to be adjacent to both main surfaces of the insulating layer; the insulating layer includes at least two particle-containing resin layers containing insulating particles in an insulating resin, and a particle-free resin layer formed of an insulating resin; and the particle-free resin layer is interposed between the particle-containing resin layers.Type: GrantFiled: January 24, 2017Date of Patent: March 6, 2018Assignee: KYOCERA CorporationInventors: Masaaki Harazono, Takayuki Umemoto
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Publication number: 20170215277Abstract: The wiring board of the present disclosure includes an insulating layer, and a wiring conductor existing so as to be adjacent to both main surfaces of the insulating layer; the insulating layer includes at least two particle-containing resin layers containing insulating particles in an insulating resin, and a particle-free resin layer formed of an insulating resin; and the particle-free resin layer is interposed between the particle-containing resin layers.Type: ApplicationFiled: January 24, 2017Publication date: July 27, 2017Applicant: KYOCERA CorporationInventors: Masaaki HARAZONO, Takayuki UMEMOTO
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Patent number: 8957321Abstract: A printed circuit board of the present invention includes a base body, a through-hole that penetrates through the base body in the thickness direction, and a through-hole conductor that covers an inner wall of the through-hole. The base body has a fiber layer including a plurality of glass fibers and a resin that covers the plurality of glass fibers. The glass fibers have a groove-shaped concavity on a surface exposed to the inner wall of the through-hole. The concavity is filled with a part of the through-hole conductor.Type: GrantFiled: September 26, 2012Date of Patent: February 17, 2015Assignee: KYOCERA SLC Technologies CorporationInventors: Masaaki Harazono, Yoshihiro Hosoi
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Patent number: 8890001Abstract: A wiring board of the present invention includes a substrate including a woven fabric formed of a plurality of glass fibers and a resin covering the woven fabric; a plurality of through holes T penetrating through the substrate in a thickness direction thereof; and a plurality of through hole conductors adhered to inner walls of the through holes T respectively. The through holes T include a first through hole and a second through hole, and, in the woven fabric, the number of the glass fibers through which the first through hole penetrates is larger than the number of the glass fibers through which the second through hole penetrates. In the first and second through holes, portions thereof having narrowest widths are surrounded by the woven fabric, and the narrow width portion of the first through hole is smaller than the narrow width portion of the second through hole.Type: GrantFiled: January 25, 2013Date of Patent: November 18, 2014Assignee: Kyocera SLC Technologies CorporationInventors: Takayuki Nejime, Masaaki Harazono, Yoshihiro Hosoi
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Patent number: 8863377Abstract: According to one embodiment of the invention, a method for manufacturing a circuit board comprises covering with a metal layer a surface of a first resin layer including polyimide resin; forming a plurality of conductive layers arranged on the metal layer with the conductive layers apart from each other in a planer view; roughening surfaces of the conductive layers with an alkaline aqueous solution; and etching a part of the metal layer between the conductive layers in the planer view to expose the surface of the first resin layer after roughening the surfaces of the conductive layers.Type: GrantFiled: April 27, 2011Date of Patent: October 21, 2014Assignee: Kyocera CorporationInventors: Masaaki Harazono, Takayuki Umemoto
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Patent number: 8735741Abstract: A circuit board comprises a substrate; a through hole penetrating the substrate along with a direction of a thickness thereof; and a through hole conductor covering an inner wall of the through hole. The substrate comprises a first fiber layer, a second fiber layer, and a resin layer arranged between the first fiber layer and the second fiber layer. Each of the first fiber layer and the second fiber layer has a plurality of fibers and a resin arranged among the plurality of the fibers. The resin layer contains a resin and doesn't contain a fiber. The inner wall of the through hole, in a cross-section view along with the direction of the thickness of the substrate, comprises a curved depression in the resin layer.Type: GrantFiled: November 21, 2011Date of Patent: May 27, 2014Assignee: Kyocera CorporationInventors: Masaaki Harazono, Yoshihiro Hosoi
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Patent number: 8273203Abstract: According to the present invention, a method for manufacturing a prepreg sheet includes steps of (A) forming a resin layer 61 on a surface of a supporter 3, (B) winding a reinforcing yarn 10 around the resin layer 61, and (C) embedding at least a part of the reinforcing yarn 10 in the resin layer 61. Preferably, in step (C), the surface of the supporter 3 is relatively moved towards the reinforcing yarn 10.Type: GrantFiled: February 15, 2011Date of Patent: September 25, 2012Assignee: Kyocera CorporationInventors: Masaaki Harazono, Toshihiro Matsumoto
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Publication number: 20120132462Abstract: A circuit board comprises a substrate; a through hole penetrating the substrate along with a direction of a thickness thereof; and a through hole conductor covering an inner wall of the through hole. The substrate comprises a first fiber layer, a second fiber layer, and a resin layer arranged between the first fiber layer and the second fiber layer. Each of the first fiber layer and the second fiber layer has a plurality of fibers and a resin arranged among the plurality of the fibers. The resin layer contains a resin and doesn't contain a fiber. The inner wall of the through hole, in a cross-section view along with the direction of the thickness of the substrate, comprises a curved depression in the resin layer.Type: ApplicationFiled: November 21, 2011Publication date: May 31, 2012Applicant: KYOCERA CORPORATIONInventors: Masaaki Harazono, Yoshihiro Hosoi
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Publication number: 20110314666Abstract: According to one embodiment of the invention, a method for manufacturing a circuit board comprises covering with a metal layer a surface of a first resin layer including polyimide resin; forming a plurality of conductive layers arranged on the metal layer with the conductive layers apart from each other in a planer view; roughening surfaces of the conductive layers with an alkaline aqueous solution; and etching a part of the metal layer between the conductive layers in the planer view to expose the surface of the first resin layer after roughening the surfaces of the conductive layers.Type: ApplicationFiled: April 27, 2011Publication date: December 29, 2011Applicant: Kyocera CorporationInventors: Masaaki Harazono, Takayuki Umemoto
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Patent number: 8012561Abstract: A fiber-reinforced resin is provided which includes a fiber bundle 2 comprising a plurality of monofilament layers 20, 21, and 22 being laminated, each of the monofilament layers comprising a plurality of monofilaments 23 arranged in one direction and an adhesive 3 for adhering the monofilaments 23 of the fiber bundle 2 together, and the fiber bundle 2 has a honeycomb-shaped cross section.Type: GrantFiled: March 26, 2008Date of Patent: September 6, 2011Assignee: Kyocera CorporationInventors: Masaaki Harazono, Masaharu Shirai, Katsura Hayashi
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Publication number: 20110139348Abstract: According to the present invention, a method for manufacturing a prepreg sheet includes steps of (A) forming a resin layer 61 on a surface of a supporter 3, (B) winding a reinforcing yarn 10 around the resin layer 61, and (C) embedding at least a part of the reinforcing yarn 10 in the resin layer 61. Preferably, in step (C), the surface of the supporter 3 is relatively moved towards the reinforcing yarn 10.Type: ApplicationFiled: February 15, 2011Publication date: June 16, 2011Applicant: KYOCERA CORPORATIONInventors: Masaaki HARAZONO, Toshihiro MATSUMOTO
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Patent number: 7951447Abstract: According to the present invention, a method for manufacturing a prepreg sheet includes steps of (A) forming a resin layer 61 on a surface of a supporter 3, (B) winding a reinforcing yarn 10 around the resin layer 61, and (C) embedding at least a part of the reinforcing yarn 10 in the resin layer 61. Preferably, in step (C), the surface of the supporter 3 is relatively moved towards the reinforcing yarn 10.Type: GrantFiled: January 31, 2008Date of Patent: May 31, 2011Assignee: Kyocera CorporationInventors: Masaaki Harazono, Toshihiro Matsumoto
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Publication number: 20100136284Abstract: A fiber-reinforced resin is provided which includes a fiber bundle 2 comprising a plurality of monofilament layers 20, 21, and 22 being laminated, each of the monofilament layers comprising a plurality of monofilaments 23 arranged in one direction and an adhesive 3 for adhering the monofilaments 23 of the fiber bundle 2 together, and the fiber bundle 2 has a honeycomb-shaped cross section.Type: ApplicationFiled: March 26, 2008Publication date: June 3, 2010Applicant: KYOCERA CORPORATIONInventors: Masaaki Harazono, Masaharu Shirai, Katsura Hayashi
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Publication number: 20100062249Abstract: According to the present invention, a method for manufacturing a prepreg sheet includes steps of (A) forming a resin layer 61 on a surface of a supporter 3, (B) winding a reinforcing yarn 10 around the resin layer 61, and (C) embedding at least a part of the reinforcing yarn 10 in the resin layer 61. Preferably, in step (C), the surface of the supporter 3 is relatively moved towards the reinforcing yarn 10.Type: ApplicationFiled: January 31, 2008Publication date: March 11, 2010Applicant: KYOCERA CORPORATIONInventors: Masaaki Harazono, Toshihiro Matsumoto