Patents by Inventor Masaaki Kawai

Masaaki Kawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6934501
    Abstract: An image reading apparatus includes a transport path for transporting an original from an original tray to a reading position; a reading device for reading the original at a reading position; a determining device for determining whether the original includes a black and white image or color image; a circulating path for returning the original to the reading position without turning over the original; a discharge path for guiding the original from the reading position to a discharge tray; and selection means for selecting one of the circulating path and the discharge path. The image reading apparatus reads the same side of the original fed from the circulating path again according to a result of the determining device.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: August 23, 2005
    Assignee: NISCA Corporation
    Inventors: Masaaki Kawai, Chiaki Osada
  • Patent number: 6859637
    Abstract: An image reading apparatus includes a transport path for guiding an original from an original tray to a reading position; a transport device for transporting the original toward a downstream side in a forward direction or toward an upstream side in a reverse direction; a reading device for reading the original at the reading position; a determining device for determining whether the original has a black and white image or color image; and a retreat path disposed at an upstream side of the reading position for retreating at least a part of the original from the transport path. After the determining device determines the original, the original is transported in the reverse direction to retreat it to the retreat path. Then, the original is transported to the reading position, so that the reading device reads the original in a reading mode according to a result of the determination.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: February 22, 2005
    Assignee: Nisca Corporation
    Inventor: Masaaki Kawai
  • Publication number: 20050031501
    Abstract: An exhaust gas-purifying catalyst system is provided with a plurality of catalyst layers including a first and a second catalyst layers, supported on a support structure. The first catalyst layer comes into contact with an exhaust gas stream firstly among the plurality of catalyst layers. The second catalyst layer is provided adjacent to the first catalyst layer. The first catalyst layer contains a first noble metal active component including rhodium, together with a powder of a barely soluble barium compound in an amount of 0.05 mol to 0.2 mol per volume in liter of the support structure. The second catalyst layer contains a second noble metal active component.
    Type: Application
    Filed: September 17, 2004
    Publication date: February 10, 2005
    Applicant: CATALER CORPORATION
    Inventors: Masaaki Kawai, Tomohito Mizukami, Yasunori Sato
  • Publication number: 20040062580
    Abstract: An image reading apparatus includes a transport path for guiding an original from an original tray to a reading position; a transport device for transporting the original toward a downstream side in a forward direction or toward an upstream side in a reverse direction; a reading device for reading the original at the reading position; a determining device for determining whether the original has a black and white image or color image; and a retreat path disposed at an upstream side of the reading position for retreating at least a part of the original from the transport path. After the determining device determines the original, the original is transported in the reverse direction to retreat it to the retreat path. Then, the original is transported to the reading position, so that the reading device reads the original in a reading mode according to a result of the determination.
    Type: Application
    Filed: August 7, 2003
    Publication date: April 1, 2004
    Inventor: Masaaki Kawai
  • Publication number: 20040057763
    Abstract: An image reading apparatus includes a transport path for transporting an original from an original tray to a reading position; a reading device for reading the original at a reading position; a determining device for determining whether the original includes a black and white image or color image; a circulating path for returning the original to the reading position without turning over the original; a discharge path for guiding the original from the reading position to a discharge tray; and selection means for selecting one of the circulating path and the discharge path. The image reading apparatus reads the same side of the original fed from the circulating path again according to a result of the determining device.
    Type: Application
    Filed: August 7, 2003
    Publication date: March 25, 2004
    Inventors: Masaaki Kawai, Chiaki Osada
  • Publication number: 20020153476
    Abstract: In a data decision circuit: a clock generation unit generates a clock signal based on a phase difference signal so that the clock signal has an optimum phase with respect to a phase of an input data signal; a data determination unit determines data values carried by the input data signal, by using the clock signal; a phase-difference detection unit detects a rising-side phase difference and a falling-side phase difference, where the rising-side phase difference is a phase difference between a rising of the input data signal and a next transition in the clock signal, and the falling-side phase difference is a phase difference between the transition and a next falling of the input data signal; and a phase-difference-signal generation unit generates the phase difference signal so as to represent a difference between the rising-side phase difference and the falling-side phase difference.
    Type: Application
    Filed: September 14, 2001
    Publication date: October 24, 2002
    Inventors: Hiroyuki Rokugawa, Tadashi Ikeuchi, Daisuke Yamazaki, Masaaki Kawai
  • Patent number: 5878025
    Abstract: A plurality of switching modules arrayed in a plurality of columns and in at least one row switch over paths in accordance with path data contained in cells to transfer inputted data to a target line on the cell-unit. One or more path switching units are provided between two adjacent columns of switching modules among plural columns of switching modules and switch paths between the respective switching modules, disposed in a side-by-side relationship in a row direction, of one column of switching modules of the two adjacent columns of switching modules and the respective switching modules, disposed in the side-by-side relationship in the row direction, of the other column of the two adjacent columns of switching modules.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: March 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Masaaki Kawai, Masafumi Katoh, Yoshimi Watanabe, Hidenao Nakajima
  • Patent number: 5696759
    Abstract: A switching equipment accommodates lines and includes a line interface for processing data from the line on the unit of cell. The line interface has a basic processing unit and an additional processing unit. The basic processing unit performs a basic process on the cell. The additional processing unit separated from the basic processing unit but disconnectably connected to the basic processing unit executes an additional process on the cell. The additional processing unit includes a plurality of processing blocks for effecting a plurality of additional processes on the cells. Each processing block is individually disconnectably connected to the basic processing unit. The basic processing unit includes a selecting portion for selecting, when one or more processing blocks within the additional processing unit are connected, the connected processing blocks and performing the additional process on the cell.
    Type: Grant
    Filed: November 6, 1995
    Date of Patent: December 9, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Masaaki Kawai
  • Patent number: 5610913
    Abstract: Switching equipment in provided for performing a switching process of a fixed length cell consisting of data and a cell header. A line interface provided in the switching equipment accommodates a plurality of lines and, at the same time, processes the data from each line on a cell unit. The line interface includes individual units and a common unit. The individual units are individually connected to the plurality of lines accommodated therein and individually process the cells. The common unit is connected to the individual units and, at the same time, effects batch-processing of the cells processed by the individual units.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: March 11, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Tomonaga, Naoki Matsuoka, Miwako Watanabe, Satoshi Kuroyanagi, Yutaka Ezaki, Akira Hakata, Ryuichi Takechi, Masaaki Kawai
  • Patent number: 5515386
    Abstract: A transmission circuit transmits a normal cell data and an idle cell data via a communication line. The idle cell data is transmitted to fill time slots in the communication line at which there is no normal data to be transmitted, each of the normal cell data and idle cell data including first data, second data and third data. The first, second and third data of the normal cell data respectively indicate a destination, an error correcting code of the first data and desired information. The first and second data of the idle cell data have predetermined bit patterns and the third data of the idle cell data may have any arbitrary bit pattern.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: May 7, 1996
    Assignee: Fujitsu Limited
    Inventors: Yuji Takizawa, Masaaki Kawai, Hidetoshi Naito, Kazuyuki Tajima, Satomi Ikeda
  • Patent number: 5408476
    Abstract: A 1-bit error correction circuit based on CRC calculation is provided with a syndrome generation circuit which determines input parallel data of m bits and which have been converted from n number of m-bit serial data. A 1-bit error detection circuit cyclically supplies a syndrome to a remainder calculation circuit and decodes remainder data obtained from this cyclic supply and detects 1-bit errors. A actual data reproduction circuit calculates the exclusive OR of output data of a predetermined register of a 1'st.about.n'th register of a syndrome generation circuit and data supplied to a predetermined register and obtains parallel data which is the actual data. A correction circuit which calculates a exclusive OR of parallel data obtained from a actual data reproduction circuit and 1-bit error data detected by the 1-bit error detection circuit and outputs corrected data.
    Type: Grant
    Filed: February 11, 1993
    Date of Patent: April 18, 1995
    Assignees: Fujitsu Limited, Nippon Telegraph and Telephone Corporation
    Inventors: Masaaki Kawai, Masayoshi Sekido, Yuji Takizawa, Hidetoshi Naito, Satomi Ikeda, Kazuyuki Tajima, Haruo Yamashita, Hideo Tatsuno
  • Patent number: 5265088
    Abstract: A cross-connection apparatus for B-ISDN includes plural interface units, multiplexers, virtual path identifier (VPI) conversion tables, demultiplexers, and loop-back units and a switch unit.
    Type: Grant
    Filed: June 2, 1992
    Date of Patent: November 23, 1993
    Assignees: Fujitsu Limited, Nippon Telegraph and Telephone Corporation
    Inventors: Yuji Takigawa, Masaaki Kawai, Hidetoshi Naito, Hisako Watanabe, Kazuyuki Tajima, Haruo Yamashita
  • Patent number: 5257311
    Abstract: A system for monitoring an ATM cross-connecting apparatus by inputting a test cell through a path for a main signal into the ATM cross-connecting apparatus, and examining the cell after the cell passed through the ATM cross-connecting apparatus. An initial value of a PN sequence and the PN sequence generated based on the initial bit sequence is written in the test cell before inputting to the ATM cross-connecting apparatus. When examining the test cell, the initial bit sequence and the PN sequence are read from the cell, a PN sequence is generated based on the initial bit sequence, and the generated pseudo-noise sequence is then compared with the PN sequence read from the test cell to detect an error in the test cell. In addition, a bit pattern indicating a primitive polynomial to generate the PN sequence may be written in the test cell. In this case, the bit pattern is used for generating the PN sequence when examining the test cell.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: October 26, 1993
    Assignee: Fujitsu Limited
    Inventors: Hidetoshi Naito, Masaaki Kawai, Hisako Watanabe, Yuji Takizawa, Kazuyuki Tajima, Haruo Yamashita
  • Patent number: 5001726
    Abstract: A circuit for generating a discrimination voltage level V.sub.ref which is used as a reference voltage to discriminate between two adjacent logic levels or an input signal which can have a plurality of different voltage levels generally corresponding to a plurality of respective, different logic levels. The frequency at which the levels of the input signals lie in the upper half of the vicinity (i.e., the voltage range from the level V.sub.ref -.DELTA.V to the level V.sub.ref +.DELTA.V) of the discrimination voltage level (i.e., the "upper half" thereof being the voltage range from V.sub.ref to V.sub.ref +.DELTA.V, ".DELTA.V" being a predetermined off-set value) and the frequency at which the levels of the input signals lie in the lower half of the vicinity (i.e., as above defined) of the discrimination level (i.e., the "low half" thereof being the voltage range from V.sub.ref -.DELTA.V to V.sub.ref) are compared, and the discrimination level is controlled so that the above two frequencies are the same.
    Type: Grant
    Filed: February 22, 1989
    Date of Patent: March 19, 1991
    Assignee: Fujitsu Limited
    Inventors: Masaaki Kawai, Hisako Watanabe, Tomoyuki Ohtsuka
  • Patent number: 4935701
    Abstract: A phase shift circuit used in a regenerating repeater, includes a separating unit for separating an input signal into two separate signals having a phase difference of a phase angle of 90.degree. therebetween, one separated signal having a "0" phase and the other separated signal having a ".pi./2" phase. A distributing unit distributes the "0" phase separated signal and ".pi./2" phase separated signal as three distributed signals having phase difference of phase angles of 90.degree. and 180.degree. therebetween, one distributed signal having a "0" phase and the others being a ".pi./2" phase distributed signal and a ".pi." phase distributed signal. A weighting/compounding unit analyzes the "0" phase distributed signal, ".pi./2" phase distributed signal, and ".pi.
    Type: Grant
    Filed: September 19, 1988
    Date of Patent: June 19, 1990
    Assignee: Fujitsu Limited
    Inventors: Masaaki Kawai, Hisako Watanabe, Tomoyuki Ohtsuka, Haruo Yamashita
  • Patent number: 4144443
    Abstract: A method and apparatus for horizontal fillet welding of steel plates, particularly coated or painted steel plates, in which two spaced apart welding wires are directed toward the line of intersection of a vertical steel plate and a horizontal steel plate to be welded together so that the centerline defined between the two wires intersects with such line of intersection. The wires are alternately fed toward the line of intersection in such a manner that one of the wires is fed to the vertical plate at a first predetermined rate and the other of the wires is fed to the horizontal plate at a second predetermined rate which is greater than the first rate.
    Type: Grant
    Filed: September 1, 1977
    Date of Patent: March 13, 1979
    Assignee: Sumitomo Metal Industries Limited
    Inventors: Yoshinori Ito, Masaaki Kawai, Masahiko Ikeda
  • Patent number: 4058700
    Abstract: A method and apparatus for horizontal fillet welding of steel plates, particularly coated or painted steel plates, in which two spaced apart welding wires are directed toward the line of intersection of a vertical steel plate and a horizontal steel plate to be welded together so that the centerline defined between the two wires intersects with such line of intersection. The wires are alternately fed toward the line of intersection in such a manner that one of the wires is fed to the vertical plate at a first predetermined rate and the other of the wires is fed to the horizontal plate at a second predetermined rate which is greater than the first rate.
    Type: Grant
    Filed: February 3, 1976
    Date of Patent: November 15, 1977
    Assignee: Sumitomo Metal Industries Ltd.
    Inventors: Yoshinori Ito, Masaaki Kawai, Masahiko Ikeda