Abstract: Image track display apparatus including a memory for delaying an image signal by at least one vertical scanning period, a first subtraction circuit for taking a first difference signal between the image signal and its delayed image signal through the memory. The first difference signal includes first and second polarity components, a non-linear processing circuit for multiplying the one polarity component of the first difference signal by K times (0<K<1) and for reducing the other polarity component of the first difference signal to the zero value when the other polarity component exceeds a prescribed value, a second subtraction circuit for taking a second difference signal between the output signal of the non-linear processing circuit and the image signal, and a display device for displaying the delayed image signal obtained through the memory circuit.

Abstract: A circuit for reducing noises of a chrominance signal in a television receiver.

Abstract: A noise reduction circuit stores the video signal of one frame as input through an A/D converter from a VTR main body, into a frame memory via a first subtracting circuit. A second subtracting circuit subtracts the delayed video signal delayed one frame, which is derived from said frame memory, from the video signal. The same outputs the subtraction result as a difference signal. The amplitude level of the video signal is detected by the detecting circuit. The nonlinear characteristic appropriate to the difference signal output from the subtracting circuit is selected by the level signal output from the detecting circuit. Subtracting circuit subtracts the noise component selected and extracted by the nonlinear processing circuit from the video signal, thereby to remove the noise component. The video signal with no noise component is applied through a D/A converter from the subtracting circuit, to a CRT display where it is visualized.

Abstract: A noise reduction circuit allows a field memory to store 1-field data of a video signal through a subtracting circuit. The video signal is supplied from a VTR through an A/D converter. The noise reduction circuit causes a subtracting circuit to subtract a delayed video signal, which is supplied from the field memory with a 1-field time delay, from the video signal and allows the resultant signal to be output as a field difference signal. A noise component included in the video signal is extracted by a noise extracting circuit in accordance with the field difference signal, and is output to the subtracting circuit. In a comparing circuit, the noise component is compared with a predetermined reference value so as to determine whether the video signal represents a motion or motionless picture. In accordance with this determination result, memory control circuit controls whether to write the video signal supplied from the subtracting circuit in the field memory.