Abstract: Provided is a test apparatus that tests a memory under test including a plurality of repair regions for repairing fails in a memory region, the test apparatus comprising a testing section that sequentially tests each of a plurality of portions of the memory region of the memory under test; a repair solution memory that stores a repair solution indicating which repair region replaces a fail portion of the memory under test; and an updating section that, during testing, in response to a new fail portion being detected by the testing section, updates the repair solution stored in the repair solution memory to be a repair solution that also repairs the newly detected fail portion.

Abstract: Provided is a semiconductor test apparatus that tests a device under test, comprising a test unit that tests a device under test; and a serial transmitting section that transmits transmission data back and forth between the test unit and a control section controlling the test unit. The serial transmitting section includes a data sending section that sends a plurality of pieces of the transmission data in a predetermined order; a resending control section that resends the transmission data; and an expected acknowledgement ID storage section that stores an expected acknowledgement ID indicating identification data that is expected to be attached to an acknowledgement signal received on a transmission side. The resending control section judges whether resending is necessary based on (i) whether resend count information indicates that a piece of transmission data is resent data and (ii) the expected acknowledgment ID in the expected acknowledgement ID storage section.

Abstract: A communication system comprising a first communication apparatus and a second communication apparatus. The first communication apparatus includes a communicating section that communicates with the second communication apparatus via a first data signal line; an alive signal receiving section that receives, via a first alive signal line, an alive signal indicating whether the second communication apparatus is in an alive state in which it is capable of communicating with the first communication apparatus; and a reset signal transmitting section that, when the second communication apparatus is not in the alive state, transmits a reset signal to the second communication apparatus.

Abstract: Provided is a semiconductor test apparatus that tests a device under test, comprising a test unit that tests a device under test; and a serial transmitting section that transmits transmission data back and forth between the test unit and a control section controlling the test unit. The serial transmitting section includes a data sending section that sends a plurality of pieces of the transmission data in a predetermined order; a resending control section that resends the transmission data; and an expected acknowledgement ID storage section that stores an expected acknowledgement ID indicating identification data that is expected to be attached to an acknowledgement signal received on a transmission side. The resending control section judges whether resending is necessary based on (i) whether resend count information indicates that a piece of transmission data is resent data and (ii) the expected acknowledgment ID in the expected acknowledgement ID storage section.