Patents by Inventor Masaaki OCHIAI

Masaaki OCHIAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method for manufacturing the same
    Patent number: 9953961
    Abstract: A semiconductor device can reduce the number of bonding wires. The semiconductor device includes two or more semiconductor elements each of which has electrodes on a first main surface and a second main surface, an electrode plate that has one surface which is bonded to electrodes on the first main surfaces of the semiconductor elements, with a first bonding material layer interposed therebetween, and extends over the electrodes on the first main surfaces of the two or more semiconductor elements, and a conductive plate that includes a first lead terminal and a semiconductor element bonding portion which is bonded to electrodes on the second main surfaces of the semiconductor elements. A second bonding material layer is interposed therebetween, and is connected to the electrodes on the second main surfaces of the two or more semiconductor elements.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: April 24, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takeshi Yokoyama, Masaaki Ochiai, Atsushi Maruyama, Tomonori Seki, Shinichiro Matsunaga
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20150028467
    Abstract: A semiconductor device can reduce the number of bonding wires. The semiconductor device includes two or more semiconductor elements each of which has electrodes on a first main surface and a second main surface, an electrode plate that has one surface which is bonded to electrodes on the first main surfaces of the semiconductor elements, with a first bonding material layer interposed therebetween, and extends over the electrodes on the first main surfaces of the two or more semiconductor elements, and a conductive plate that includes a first lead terminal and a semiconductor element bonding portion which is bonded to electrodes on the second main surfaces of the semiconductor elements. A second bonding material layer is interposed therebetween, and is connected to the electrodes on the second main surfaces of the two or more semiconductor elements.
    Type: Application
    Filed: October 10, 2014
    Publication date: January 29, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Takeshi YOKOYAMA, Masaaki OCHIAI, Atsushi MARUYAMA, Tomonori SEKI, Shinichiro MATSUNAGA