Patents by Inventor Masaaki Okita

Masaaki Okita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7851871
    Abstract: A high-voltage transistor and a peripheral circuit including a second conductivity type MOSFET are provided together on a first conductivity type semiconductor substrate. The high-voltage transistor includes: a low concentration drain region of a second conductivity type formed in the semiconductor substrate; a low concentration source region of a second conductivity type formed in the semiconductor substrate and spaced apart from the low concentration drain region; and a high concentration source region of a second conductivity type having a diffusion depth deeper than that of the low concentration source region. A diffusion depth of the low concentration source region is equal to that of source/drain regions of the MOSFET.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: December 14, 2010
    Assignee: Panasonic Corporation
    Inventors: Yuji Harada, Kazuyuki Sawada, Masahiko Niwayama, Masaaki Okita
  • Publication number: 20100001315
    Abstract: A semiconductor device includes a first diffusion region of a second conductivity type formed in an upper portion of a semiconductor substrate of a first conductivity type, a second diffusion region formed in a surface portion of the first diffusion region, a third diffusion region of the second conductivity type formed a predetermined distance spaced apart from the second diffusion region in the surface portion of the semiconductor substrate, a fourth diffusion region of the first conductivity type formed adjacent to the third diffusion region and electrically connected to the third diffusion region, a gate electrode formed on a part between the first diffusion region and the third diffusion region, and an insulating film formed thereon.
    Type: Application
    Filed: May 28, 2009
    Publication date: January 7, 2010
    Inventors: Masaaki OKITA, Kazuyuki Sawada, Yuji Harada, Saichirou Kaneko, Hiroto Yamagiwa
  • Publication number: 20090090978
    Abstract: A high-voltage transistor and a peripheral circuit including a second conductivity type MOSFET are provided together on a first conductivity type semiconductor substrate. The high-voltage transistor includes: a low concentration drain region of a second conductivity type formed in the semiconductor substrate; a low concentration source region of a second conductivity type formed in the semiconductor substrate and spaced apart from the low concentration drain region; and a high concentration source region of a second conductivity type having a diffusion depth deeper than that of the low concentration source region. A diffusion depth of the low concentration source region is equal to that of source/drain regions of the MOSFET.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 9, 2009
    Inventors: Yuji Harada, Kazuyuki Sawada, Masahiko Niwayama, Masaaki Okita
  • Patent number: 6915517
    Abstract: A digital signal processor comprises an arithmetic device 12 wherein a reservation processing register 26, to which setting to which from the arithmetic device 11 is possible and which has a construction for storing an address and an execution mode as a task list 18, and a clear circuit 27 for clearing the execution mode when the address in the reservation processing register 26 is copied to a program counter 21, are newly added. Threreby, in the digital signal processor comprising two arithmetic devices, it is possible to remove the processing waiting time as well as to change the processing order at respective arithmetic devices.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Imamura, Takao Inoue, Masaaki Okita
  • Patent number: 6687202
    Abstract: In an optical disk drive having the structure of rotating an optical disk under the alternative control of CAV or CLV, when the optical disk is rotated under the CLV control, the loop gains for at least one of the focus servo system and the tracking servo system for controlling the operation of the pickup of the optical disk drive are adjusted based on angular velocity detected by an angular velocity detector which is also used for rotating the optical disk under the CAV control, and, when the optical disk is rotated under the CAV control, the loop gains for at least one of the focus servo system and the tracking servo system are adjusted based on linear velocity detected by a linear velocity detector which is also used for rotating the optical disk under CLV control. The above structure enables the effective saving of electricity and cost in the optical disk drive.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: February 3, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiro Watanabe, Yasushi Imamura, Masaaki Okita, Yuichi Kobayashi