Patents by Inventor Masaaki Yamauchi

Masaaki Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145116
    Abstract: An insulated wire including: a linear conductor; and an insulating layer that covers an outer peripheral surface of the conductor, wherein the insulating layer contains, as residual solvents, a first solvent having a relative permittivity of 15 or more and a second solvent having a relative permittivity of less than 15, a first ratio that is a ratio of a content of the second solvent to a total content of the first solvent and the second solvent contained in the insulating layer is 50% by mass or more, and a second ratio that is a ratio of the content of the second solvent to the total content of the first solvent and the second solvent contained in the insulating layer after a heating treatment of heating the insulated wire at 350° C. for 1 minute is higher than the first ratio.
    Type: Application
    Filed: May 2, 2022
    Publication date: May 2, 2024
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Takahiro IWAMOTO, Masaaki YAMAUCHI, Hirotsugu MOCHIDA
  • Publication number: 20240052199
    Abstract: An insulated wire comprising a conductor and an insulating layer covering the conductor, wherein: the insulating layer comprises a resin and a first filler; the resin comprises a polyimide; the first filler is present in the form of a primary particle or a secondary particle having a plurality of the primary particles aggregated; the primary particle is a silica or alumina particle; the secondary particle has a particle diameter of 0.03 ?m or more and 5 ?m or less; and the percentage of the total area of the secondary particles to the sum of the total area of the primary particles and the total area of the secondary particles in the cross section of the insulated wire is 50% or more.
    Type: Application
    Filed: January 19, 2022
    Publication date: February 15, 2024
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Hideaki SAITO, Takuya MURAKAMI, Masaaki YAMAUCHI
  • Publication number: 20230017427
    Abstract: The resin composition according to one aspect is a resin composition containing a polyamic acid and a solvent, wherein the polyamic acid has a repeating unit represented by the following general formula (1) in a molecular chain, and the molecular chain has a structure represented by the following general formula (2) at one end or both ends. The proportion of the structure represented by the following general formula (2) relative to 1 mol of the repeating unit represented by the following general formula (1) is 0.001 mol or more and 0.1 mol or less. In the following general formulas, R1 is a tetravalent organic group; R2 is a divalent organic group; and R3 is an organic group having 15 or less carbon atoms.
    Type: Application
    Filed: June 20, 2019
    Publication date: January 19, 2023
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Hideaki SAITO, Masaaki YAMAUCHI, Jun SUGAWARA, Yudai FURUYA, Kengo YOSHIDA, Yuji HATANAKA
  • Patent number: 10991477
    Abstract: An insulated electrical cable includes: a conductor; and an insulating layer that is laminated on an outer peripheral surface of the conductor and includes a polyimide as a main component, wherein the insulating layer includes a plurality of pores, and wherein a porosity of the insulating layer is greater than or equal to 25% by volume and less than or equal to 60% by volume.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: April 27, 2021
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shinya Ota, Masaaki Yamauchi, Hideaki Saito, Shuhei Maeda, Yasushi Tamura, Kengo Yoshida
  • Patent number: 10962498
    Abstract: A method for producing an insulated electric wire includes a step of preparing a conductor having a linear shape; a step of forming an insulating coating so as to cover a surface on an outer peripheral side of the conductor to obtain an insulated electric wire that includes the conductor and the insulating coating covering the conductor; and a step of measuring a first electrostatic capacity between the insulated electric wire and a first electrode disposed outside in a radial direction of the insulated electric wire so as to face an outer peripheral surface of the insulated electric wire while transporting the insulated electric wire in a longitudinal direction of the conductor, and inspecting a formation state of the insulating coating, the formation state including a formation state of a defective portion in the insulating coating, on the basis of a change in the first electrostatic capacity.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: March 30, 2021
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shinya Ota, Masaaki Yamauchi, Jun Sugawara, Yasushi Tamura, Kengo Yoshida, Takao Inoue, Hiroji Sugimoto
  • Patent number: 10832829
    Abstract: An insulated electric wire includes a linear conductor and one or a plurality of insulating layers formed on an outer peripheral surface of the conductor. At least one of the one or plurality of insulating layers contains a plurality of pores, outer shells are disposed on peripheries of the pores, and the outer shells are derived from shells of hollow-forming particles having a core-shell structure. A varnish for forming an insulating layer contains a resin composition forming a matrix and hollow-forming particles having a core-shell structure and dispersed in the resin composition. In the varnish, cores of the hollow-forming particles contain a thermally decomposable resin as a main component, and shells of the hollow-forming particles contain a main component having a higher thermal decomposition temperature than the thermally decomposable resin.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 10, 2020
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shinya Ota, Shuhei Maeda, Hideaki Saito, Jun Sugawara, Masaaki Yamauchi, Yasushi Tamura, Kengo Yoshida, Yudai Furuya, Yuji Hatanaka
  • Publication number: 20200152348
    Abstract: An insulated electrical cable according to one aspect of the present invention is an insulated electrical cable including: a conductor; and an insulating layer that is laminated on an outer peripheral surface of the conductor and includes a polyimide as a main component, wherein the insulating layer includes a plurality of pores, and wherein a porosity of the insulating layer is greater than or equal to 25% by volume and less than or equal to 60% by volume.
    Type: Application
    Filed: April 26, 2018
    Publication date: May 14, 2020
    Inventors: Shinya OTA, Masaaki YAMAUCHI, Hideaki SAITO, Shuhei MAEDA, Yasushi TAMURA, Kengo YOSHIDA
  • Publication number: 20200135360
    Abstract: An insulated electric wire includes a linear conductor and an insulating film disposed to surround the periphery of the conductor. The insulating film includes a polyimide layer formed of a polyimide that has a molecular structure including a PMDA-ODA-type repeating unit A and a BPDA-ODA-type repeating unit B, the mole fraction [B×100/(A+B)] (% by mole) represented by the percentage of the number of moles of the repeating unit B to the total number of moles of the repeating unit A and the repeating unit B being 25% or more by mole and 95% or less by mole. The polyimide layer has a plurality of pores. The pores occupy 5% or more by volume and 80% or less by volume of the polyimide layer.
    Type: Application
    Filed: June 15, 2018
    Publication date: April 30, 2020
    Inventors: Shuhei MAEDA, Masaaki YAMAUCHI, Shinya OTA, Hideaki SAITO, Yasushi TAMURA, Kengo YOSHIDA, Shigenori HOMMA
  • Publication number: 20200118705
    Abstract: An insulated electric wire includes a conductor that has a linear shape and an insulating film that is formed to cover the periphery of the conductor. The insulating film is formed of a polyimide that has a molecular structure including a PMDA-ODA-type repeating unit A and a BPDA-ODA-type repeating unit B, the mole ratio [B/(A+B)]×100 (% by mole) of the number of moles of the repeating unit B to the total number of moles of the repeating unit A and the repeating unit B being more than 55% by mole. A first sample of the insulating film with a separation elongation of 7% has a ratio M60/M10 of 1.2 or more, or a second sample of the insulating film with a separation elongation of 40% has a ratio M30/M10 of 1.2 or more.
    Type: Application
    Filed: June 15, 2018
    Publication date: April 16, 2020
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shuhei MAEDA, Masaaki YAMAUCHI, Tokiko UMEMOTO, Yasushi TAMURA
  • Patent number: 10607750
    Abstract: An insulated wire according to one embodiment of the present invention includes a linear conductor, and one or a plurality of insulating layers that are laminated on an outer peripheral surface of the conductor, wherein at least one layer of the one or plurality of insulating layers includes a plurality of pores, and a closed porosity within the plurality of pores is 80% by volume or higher.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: March 31, 2020
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shinya Ota, Masaaki Yamauchi, Kengo Yoshida, Yasushi Tamura
  • Publication number: 20200033286
    Abstract: A method for producing an insulated electric wire includes a step of preparing a conductor having a linear shape; a step of forming an insulating coating so as to cover a surface on an outer peripheral side of the conductor to obtain an insulated electric wire that includes the conductor and the insulating coating covering the conductor; and a step of measuring a first electrostatic capacity between the insulated electric wire and a first electrode disposed outside in a radial direction of the insulated electric wire so as to face an outer peripheral surface of the insulated electric wire while transporting the insulated electric wire in a longitudinal direction of the conductor, and inspecting a formation state of the insulating coating, the formation state including a formation state of a defective portion in the insulating coating, on the basis of a change in the first electrostatic capacity.
    Type: Application
    Filed: October 20, 2017
    Publication date: January 30, 2020
    Inventors: Shinya OTA, Masaaki YAMAUCHI, Jun SUGAWARA, Yasushi TAMURA, Kengo YOSHIDA, Takao INOUE, Hiroji SUGIMOTO
  • Publication number: 20190371496
    Abstract: An insulated wire according to one embodiment of the present invention includes a linear conductor, and one or a plurality of insulating layers that are laminated on an outer peripheral surface of the conductor, wherein at least one layer of the one or plurality of insulating layers includes a plurality of pores, and a closed porosity within the plurality of pores is 80% by volume or higher.
    Type: Application
    Filed: March 21, 2018
    Publication date: December 5, 2019
    Inventors: Shinya OTA, Masaaki YAMAUCHI, Kengo YOSHIDA, Yasushi TAMURA
  • Patent number: 10485102
    Abstract: A first embodiment of a substrate for a high-frequency printed wiring board according to the present disclosure is directed to a substrate for a high-frequency printed wiring board, the substrate including: a dielectric layer including a fluororesin and an inorganic filler; and a copper foil layered on at least one surface of the dielectric layer, wherein a surface of the copper foil at the dielectric layer side has a maximum height roughness (Rz) of less than or equal to 2 ?m, and a ratio of the number of inorganic atoms of the inorganic filler to the number of fluorine atoms of the fluororesin in a superficial region of the dielectric layer at the copper foil side is less than or equal to 0.08.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: November 19, 2019
    Assignees: Sumitomo Electric Industries, Ltd., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Shingo Kaimori, Masaaki Yamauchi, Kentaro Okamoto, Satoshi Kiya, Kazuo Murata
  • Patent number: 10468153
    Abstract: An insulated electric wire includes a linear conductor and one or more of insulating layers formed on an outer peripheral surface of the conductor. In the insulated electric wire, at least one of the one or more of insulating layers has a plurality of pores, outer shells are disposed on peripheries of the pores, and each of the outer shells has a plurality of projections on an outer surface thereof.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: November 5, 2019
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Shinya Ota, Masaaki Yamauchi, Jun Sugawara, Yasushi Tamura, Kengo Yoshida
  • Publication number: 20190215957
    Abstract: A first embodiment of a substrate for a high-frequency printed wiring board according to the present disclosure is directed to a substrate for a high-frequency printed wiring board, the substrate including: a dielectric layer including a fluororesin and an inorganic filler; and a copper foil layered on at least one surface of the dielectric layer, wherein a surface of the copper foil at the dielectric layer side has a maximum height roughness (Rz) of less than or equal to 2 ?m, and a ratio of the number of inorganic atoms of the inorganic filler to the number of fluorine atoms of the fluororesin in a superficial region of the dielectric layer at the copper foil side is less than or equal to 0.08.
    Type: Application
    Filed: June 20, 2018
    Publication date: July 11, 2019
    Applicants: Sumitomo Electric Industries, Ltd., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Shingo KAIMORI, Masaaki YAMAUCHI, Kentaro OKAMOTO, Satoshi KIYA, Kazuo MURATA
  • Publication number: 20190074106
    Abstract: An insulated electric wire includes a linear conductor and one or more of insulating layers formed on an outer peripheral surface of the conductor. In the insulated electric wire, at least one of the one or more of insulating layers has a plurality of pores, outer shells are disposed on peripheries of the pores, and each of the outer shells has a plurality of projections on an outer surface thereof.
    Type: Application
    Filed: May 12, 2017
    Publication date: March 7, 2019
    Inventors: Shinya OTA, Masaaki YAMAUCHI, Jun SUGAWARA, Yasushi TAMURA, Kengo YOSHIDA
  • Publication number: 20180033518
    Abstract: An insulated electric wire includes a linear conductor and one or a plurality of insulating layers formed on an outer peripheral surface of the conductor. At least one of the one or plurality of insulating layers contains a plurality of pores, outer shells are disposed on peripheries of the pores, and the outer shells are derived from shells of hollow-forming particles having a core-shell structure. A varnish for forming an insulating layer contains a resin composition forming a matrix and hollow-forming particles having a core-shell structure and dispersed in the resin composition. In the varnish, cores of the hollow-forming particles contain a thermally decomposable resin as a main component, and shells of the hollow-forming particles contain a main component having a higher thermal decomposition temperature than the thermally decomposable resin.
    Type: Application
    Filed: October 25, 2016
    Publication date: February 1, 2018
    Inventors: Shinya OTA, Shuhei MAEDA, Hideaki SAITO, Jun SUGAWARA, Masaaki YAMAUCHI, Yasushi TAMURA, Kengo YOSHIDA, Yudai FURUYA, Yuji HATANAKA
  • Patent number: 9378863
    Abstract: An insulating varnish forms an insulating coating film having a shape that corresponds to the shape of an opening of a die, having a uniform thickness. The insulating varnish is applied onto a surface of a conductor, subsequently passes through a die to remove the excess applied insulating varnish, and is then dried or baked to form an insulating coating film on the surface of the conductor. The insulating varnish has a viscosity of 10 Pa·s or more measured by a B-type viscometer at 30° C. The insulating varnish preferably contains no filler, and is preferably a polyimide precursor solution. Since the insulating varnish has a high viscosity, baking and solidification can be performed while maintaining a shape formed when the insulating varnish passes through a die.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: June 28, 2016
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC WINTEC, INC.
    Inventors: Kengo Yoshida, Masaaki Yamauchi, Masataka Shiwa, Yuji Hatanaka, Junichi Imai, Jun Sugawara, Toru Shimizu, Hideaki Saito, Yuudai Furuya
  • Publication number: 20140054062
    Abstract: An insulating varnish forms an insulating coating film having a shape that corresponds to the shape of an opening of a die, having a uniform thickness. The insulating varnish is applied onto a surface of a conductor, subsequently passes through a die to remove the excess applied insulating varnish, and is then dried or baked to form an insulating coating film on the surface of the conductor. The insulating varnish has a viscosity of 10 Pa·s or more measured by a B-type viscometer at 30° C. The insulating varnish preferably contains no filler, and is preferably a polyimide precursor solution. Since the insulating varnish has a high viscosity, baking and solidification can be performed while maintaining a shape formed when the insulating varnish passes through a die.
    Type: Application
    Filed: November 5, 2012
    Publication date: February 27, 2014
    Applicants: SUMITOMO ELECTRIC WINTEC, INC., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kengo Yoshida, Masaaki Yamauchi, Masataka Shiwa, Yuji Hatanaka, Junichi Imai, Jun Sugawara, Toru Shimizu, Hideaki Saito, Yuudai Furuya
  • Patent number: RE49929
    Abstract: A first embodiment of a substrate for a high-frequency printed wiring board according to the present disclosure is directed to a substrate for a high-frequency printed wiring board, the substrate including: a dielectric layer including a fluororesin and an inorganic filler; and a copper foil layered on at least one surface of the dielectric layer, wherein a surface of the copper foil at the dielectric layer side has a maximum height roughness (Rz) of less than or equal to 2 ?m, and a ratio of the number of inorganic atoms of the inorganic filler to the number of fluorine atoms of the fluororesin in a superficial region of the dielectric layer at the copper foil side is less than or equal to 0.08.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: April 16, 2024
    Assignees: Sumitomo Electric Industries, Ltd., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Shingo Kaimori, Masaaki Yamauchi, Kentaro Okamoto, Satoshi Kiya, Kazuo Murata