Patents by Inventor Masafumi Ban

Masafumi Ban has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250029027
    Abstract: A digital twin simulation is executed. In this simulation, a personal relationship level between two workers included in multiple workers is calculated. Further, based on the personal relationship level between the two workers and data of work content of the work scheduled to be executed in a work line of a real space, an assignment pattern of workers satisfying a reference condition in which a work efficiency in a whole work line of a digital space is equal to or greater than a target value is searched.
    Type: Application
    Filed: July 9, 2024
    Publication date: January 23, 2025
    Inventors: Takahiro SAKURAI, Masafumi KADOI, Shigefumi TOKUDA, Kensuke MATSUMOTO, Takumi BAN, Yoshio TAKIZAWA, Ambi SHO, Tomoyuki KAGA, Hideo HASEGAWA, Kenta MIYAHARA, Shinsuke YAMAUCHI
  • Publication number: 20250021084
    Abstract: The operation management system manages an operation of a line composed of a plurality of cooperating work subjects. The operation management system performs: setting, for each work subject, an intensity that decreases at a speed corresponding to a work speed, recovers by a recovery action, and is given a lower limit value; receiving a target handling plan for the line; creating an operation plan including at least the working speed and a timing of the recovery action by using a simulation model obtained by modeling the line so that the target handling plan is achieved while maintaining the intensity of each work subject at the lower limit value or more; and allowing the intensity of each work subject to temporarily decrease to less than the lower limit value in creation of the operation plan in response to the target handling plan exceeding a predetermined reference value.
    Type: Application
    Filed: July 8, 2024
    Publication date: January 16, 2025
    Inventors: Takahiro SAKURAI, Shigefumi TOKUDA, Masafumi KADOI, Yoshio TAKIZAWA, Kensuke MATSUMOTO, Ambi SHO, Takumi BAN, Tomoyuki KAGA, Hideo HASEGAWA, Kenta MIYAHARA, Shinsuke YAMAUCHI
  • Patent number: 8508279
    Abstract: The battery monitoring IC is provided with the short circuiting switch that includes the switching element that shorts the input side and the output side of the boosting circuit that boosts the power supply voltage to the driving voltage, that can drive the MOS transistor within the buffer amplifier in the saturated region, and supplies the driving voltage as the driving voltage of the buffer amplifier. An abnormality of the boosting circuit can be diagnosed by comparing the output voltage, that is measured when the short circuiting switch is turned off and the driving voltage boosted by the boosting circuit is supplied to the buffer amplifier, and the output voltage, that is measured when the short circuiting switch is turned on and the power supply voltage is, without going through the boosting circuit, supplied as is to the buffer amplifier.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: August 13, 2013
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Masafumi Ban
  • Publication number: 20120081167
    Abstract: The battery monitoring IC is provided with the short circuiting switch that includes the switching element that shorts the input side and the output side of the boosting circuit that boosts the power supply voltage to the driving voltage, that can drive the MOS transistor within the buffer amplifier in the saturated region, and supplies the driving voltage as the driving voltage of the buffer amplifier. An abnormality of the boosting circuit can be diagnosed by comparing the output voltage, that is measured when the short circuiting switch is turned off and the driving voltage boosted by the boosting circuit is supplied to the buffer amplifier, and the output voltage, that is measured when the short circuiting switch is turned on and the power supply voltage is, without going through the boosting circuit, supplied as is to the buffer amplifier.
    Type: Application
    Filed: September 19, 2011
    Publication date: April 5, 2012
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Masafumi BAN
  • Patent number: 7852246
    Abstract: In a scanning mode: a conversion sequence setting register sets the sequence in which analogue signals are to be converted; a multiplexer selects a single analogue signal sequentially from a plurality of analogue signals, in accordance with the order that is set in this conversion sequence setting register; an A/D converter converts the analogue signal selected by this multiplexer to a digital signal; a conversion result register having a plurality of result registers stores the digital signal obtained by conversion by the A/D converter in these storage regions in the order in which conversion was effected; and a back-up register includes result registers respectively corresponding to this plurality of result registers.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: December 14, 2010
    Assignees: Kabushiki Kaisha Toshiba, Oki Semiconductor Co., Ltd.
    Inventors: Chongshan Yang, Hiroshi Ozaki, Kazuya Yasui, Masafumi Ban