Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage.

Abstract: A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PN junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion layer 15 formed on a surface of a certain-conductivity-type semiconductor substrate or well, the impurity diffusion layer having a conductivity opposite to that of the semiconductor substrate or well, and a device separating insulation film 12 formed at a distance from the impurity diffusion layer, and a distance between an end of the impurity diffusion layer and an end of the device separating insulation film is defined to be not less than 1.2 &mgr;m.

Abstract: A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PH junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion layer 15 formed on a surface of a certain-conductivity-type semiconductor substrate or well, the impurity diffusion layer having a conductivity opposite to that of the semiconductor substrate or well, and a device separating insulation film 12 formed at a distance from the impurity diffusion layer, and a distance between an end of the impurity diffusion layer and an end of the device separating insulation film is defined to be not less than 1.2 &mgr;m.

Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage.

Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower volt age. Also, since the select transistor is provided, reading c an also be performed at a lower voltage.

Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage.

Abstract: A condenser characterized in that a pair of heat transmitting surfaces having opposed longitudinal grooves are arranged with the ridges of the longitudinal grooves contacted with or closely adjacent to each other to define steam passageways by said opposed longitudinal grooves so that the condensate in the opposed longitudinal grooves is collected in the contacted regions or between the closely adjacent regions by surface tension and allowed to flow down.

Abstract: A condenser having heat transmitting surfaces, which comprises two types of heat transmitting plates alternately arranged side by side to define alternate passages for cooling liquid and steam so that the steam is condensed on the heat transmitting surfaces on the steam passage side. The heat transmitting surfaces are formed with grooves and ridges which are recessed in and raised above the base surface, thereby providing a condensate discharging mechanism comprising vertical grooves and inclined grooves for each given region on the condensating and heat transmitting surfaces, and longitudinal grooves are formed between the inclined grooves of said condensate discharging mechanisms.