Patents by Inventor Masafumi IWASA

Masafumi IWASA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140068387
    Abstract: A low density parity check (LDPC) coding unit performs LDPC coding. An interleaving unit interleaves the LDPC-coded data, based on an array according to the number of bits that constitute a modulated symbol. A per-area division rearrangement unit divides to classify the interleaved data into a plurality of areas in a manner such that each area is formed by contiguous data and also outputs data, according to the number of bits that constitute the modulated symbol, by successively changing the areas. A symbol mapping unit generates the modulated symbol based on the data fed from the per-area division rearrangement unit.
    Type: Application
    Filed: July 30, 2013
    Publication date: March 6, 2014
    Applicant: JVC KENWOOD Corporation
    Inventors: Masafumi IWASA, Shohei ODAN, Eiji NAKANO, Toru FUJIMOTO
  • Publication number: 20130272456
    Abstract: A frame data storage unit inputs LDPC encoded data via a communication path. An estimation unit estimates, based on the inputted data, a situation of the communication path. A selection unit select, in accordance with the estimated situation of the communication path, one of a plurality of normalization constants that have been specified in advance and are to be used in updating an exterior value ratio based on a priori value ratio in check node processing according to a min-sum algorithm. A min-sum processing unit executes, on the inputted data, the min-sum algorithm by using the selected normalization constant.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 17, 2013
    Inventors: Atsushi HAYAMI, Masafumi IWASA