Abstract: The present technology relates to an imaging apparatus and an electronic device each capable of reducing or eliminating occurrence of ghost and flare in the imaging apparatus. In an imaging apparatus including a substrate having an imaging device mounted thereon, a frame fixed on the substrate, and a seal glass, wherein the seal glass and the frame are bonded together using a sealing resin to provide a structure that encapsulates the imaging device, a cured material resulting from curing of the sealing resin has a regular reflectance of 3% or less, and a diffuse reflectance of 30% or less. This can reduce or eliminate occurrence of ghost and flare in the imaging apparatus.

Abstract: A solid-state image sensor with one or more control lines driven at arbitrary dividing points along the control line.

Abstract: A solid-state image sensor with one or more control lines driven at arbitrary dividing points along the control line.

Abstract: A solid-state image sensor with one or more control lines driven at arbitrary dividing points along the control line.

Abstract: A booster circuit including an output terminal; a reference voltage generating section that generates a boosting reference voltage; a charge pump section that boosts the reference voltage and outputs the boosted reference voltage from the output terminal; and an output-terminal voltage holding section that holds the output terminal at a voltage of a high level at a standby time. The charge pump section includes an input node, at least one boosting node, at least one reference node, at least one boosting capacitor, and a plurality of switching transistors that are provided between the input node and the at least one boosting node, between a boosting node at a last stage and the output terminal, between the input node and the reference node, and between a reference potential and a reference node, and are switched on or off by a switch signal.

Abstract: To reduce random noise caused by address setting in an apparatus that controls a read address of an image sensing device, without causing a significant increase in circuit complexity. A ring shift register sets a low-order address value depending on a value in steps of which an overall address value is incremented, and a Gray code counter sets a high-order address value. In the ring shift register, a carry from the lowest-order bit to the highest-order bit does not occur, and thus use of the ring shift register makes it possible to reduce the maximum number of toggled bits. The Gray code counter does not need to include a complicated circuit for switching the value in steps of which to increment the high-order address value.

Abstract: In particular for a solid-state image sensor with high resolution, a control line is not driven at any of two end points of the control line, but the control line is driven at two arbitrary dividing points on the control line. Preferably, two points on control line whose distance from a closer end of a range in which skew is to be suppressed is equal to ¼ of the total length of the range may be selected as the dividing points at which the control line is driven. In this case, the time constant at points farthest from the driving points becomes ¼ of that which occurs when the control line is driven at both end points thereof and 1/16 of that which occurs when the control line is driven at one end point thereof, and thus, theoretically, the skew can be reduced to ¼ or 1/16 of that which occurs when the control line is driven at both end points or only one end point.

Abstract: A booster circuit includes: an output terminal; a reference voltage generating section that generates a boosting reference voltage; a charge pump section that boosts the reference voltage and outputs the boosted reference voltage from the output terminal; and an output-terminal voltage holding section that holds the output terminal at a voltage of a high level at a standby time. The charge pump section includes an input node, at least one boosting node, at least one reference node, at least one boosting capacitor, and a plurality of switching transistors that are provided between the input node and the at least one boosting node, between a boosting node at a last stage and the output terminal, between the input node and the reference node, and between a reference potential and a reference node, and are switched on or off by a switch signal.

Abstract: A solid-state imaging device includes a sharing pixel block having k (where k is a natural number other than 1) pixel transistors corresponding to n (where n is a natural number other than 1) pixels and a row-selection circuit configured to select the pixel transistors every row in the sharing pixel block using logic of an address signal and a timing signal. In this solid-state imaging device, in a case of a 1/n row decimation operation in which a signal is read every n rows, the row-selection circuit simultaneously performs shutter operations for n rows corresponding to the k pixel transistors included in the sharing pixel block using an input of a simultaneous-shutter-operation signal.

Abstract: A booster circuit includes: an output terminal; a reference voltage generating section that generates a boosting reference voltage; a charge pump section that boosts the reference voltage and outputs the boosted reference voltage from the output terminal; and an output-terminal voltage holding section that holds the output terminal at a voltage of a high level at a standby time. The charge pump section includes an input node, at least one boosting node, at least one reference node, at least one boosting capacitor, and a plurality of switching transistors that are provided between the input node and the at least one boosting node, between a boosting node at a last stage and the output terminal, between the input node and the reference node, and between a reference potential and a reference node, and are switched on or off by a switch signal.

Abstract: In particular for a solid-state image sensor with high resolution, a control line is not driven at any of two end points of the control line, but the control line is driven at two arbitrary dividing points on the control line. Preferably, two points on control line whose distance from a closer end of a range in which skew is to be suppressed is equal to ¼ of the total length of the range may be selected as the dividing points at which the control line is driven. In this case, the time constant at points farthest from the driving points becomes ¼ of that which occurs when the control line is driven at both end points thereof and 1/16 of that which occurs when the control line is driven at one end point thereof, and thus, theoretically, the skew can be reduced to ¼ or 1/16 of that which occurs when the control line is driven at both end points or only one end point.

Abstract: A solid-state imaging device includes a sharing pixel block having k (where k is a natural number other than 1) pixel transistors corresponding to n (where n is a natural number other than 1) pixels and a row-selection circuit configured to select the pixel transistors every row in the sharing pixel block using logic of an address signal and a timing signal. In this solid-state imaging device, in a case of a 1/n row decimation operation in which a signal is read every n rows, the row-selection circuit simultaneously performs shutter operations for n rows corresponding to the k pixel transistors included in the sharing pixel block using an input of a simultaneous-shutter-operation signal.

Abstract: To reduce random noise caused by address setting in an apparatus that controls a read address of an image sensing device, without causing a significant increase in circuit complexity. A ring shift register sets a low-order address value depending on a value in steps of which an overall address value is incremented, and a Gray code counter sets a high-order address value. In the ring shift register, a carry from the lowest-order bit to the highest-order bit does not occur, and thus use of the ring shift register makes it possible to reduce the maximum number of toggled bits. The Gray code counter does not need to include a complicated circuit for switching the value in steps of which to increment the high-order address value.

Abstract: In particular for a solid-state image sensor with high resolution, a control line is not driven at any of two end points of the control line, but the control line is driven at two arbitrary dividing points on the control line. Preferably, two points on control line whose distance from a closer end of a range in which skew is to be suppressed is equal to ¼ of the total length of the range may be selected as the dividing points at which the control line is driven. In this case, the time constant at points farthest from the driving points becomes ¼ of that which occurs when the control line is driven at both end points thereof and 1/16 of that which occurs when the control line is driven at one end point thereof, and thus, theoretically, the skew can be reduced to ¼ or 1/16 of that which occurs when the control line is driven at both end points or only one end point.