Abstract: A content data delivery system includes a server and a client. The server includes at least one processor configured to implement stored instructions and execute a plurality of tasks. The plurality of tasks include a server side communication task that transmits and receives test data including time information to and from the client, a calculating task that obtains a reference time difference with the client based on the time information of the test data that has been transmitted and received by the server side communication task, and a delivering task that delivers content data including information that indicates reproduction timing to the client. The server or the client includes a correcting task that corrects the reproduction timing of the content data by use of the reference time difference.

Abstract: An audio device, which is configured to receive audio data from anther device, comprises a memory that stores instructions and a processor. The processor is configured to execute the instructions stored in the memory to: receive the audio data and a time stamp attached to the audio data, output a pulse data having a predetermined length, detect end time of the pulse data, compare the end time of the pulse data and the time stamp, adjust the audio data based on the comparing result, and output the adjusted audio data.

Abstract: An audio device, which is configured to receive audio data from another device, comprises a memory that stores instructions and a processor. The processor is configured to execute the instructions stored in the memory to: receive the audio data and a time stamp attached to the audio data, output a pulse data having a predetermined length, detect end time of the pulse data, compare the end time of the pulse data and the time stamp, adjust the audio data based on the comparing result, and output the adjusted audio data.

Abstract: A content data delivery system includes a server and a client. The server includes at least one processor configured to implement stored instructions and execute a plurality of tasks. The plurality of tasks include a server side communication task that transmits and receives test data including time information to and from the client, a calculating task that obtains a reference time difference with the client based on the time information of the test data that has been transmitted and received by the server side communication task, and a delivering task that delivers content data including information that indicates reproduction timing to the client. The server or the client includes a correcting task that corrects the reproduction timing of the content data by use of the reference time difference.

Abstract: In a synchronization control device, received AC 3 coded data or zero data are written into a FIFO buffer in synchronism with bus clock pulses, while yet-to-be-read data are read out from the first-in-first-out buffer. When a difference between the quantity of the yet-to-be-read data in the FIFO buffer and a value represented by synchronization point information is outside an allowable range, a synchronism evaluation section controls a rate of the data readout from the FIFO buffer in such a manner that the difference falls within the allowable range. Synchronization point control section detects leading packet data from among a plurality of successive packet data sequentially arriving in synchronism with the bus clock pulses, and controls the value of the synchronization point information in accordance with a period between the detected leading packet data and next detected leading packet data.

Abstract: A digital interface apparatus is provided for use in an analog musical instrument capable of generating an analog audio signal, and is designed for interfacing with an external digital audio apparatus. In the digital interface apparatus, an input/output interface converts the analog audio signal generated by the analog musical instrument into a digital audio signal. The input/output interface has an input terminal and an output terminal for transmitting the digital audio signal to the external digital audio apparatus and for receiving a digital audio signal from the external digital audio apparatus. A digital signal processor processes the digital audio signal which is either converted from the analog audio signal or received from the input terminal. A main controller controls operation of the digital signal processor according to instructions. An operating member is manually operated to provide the instructions to the main controller.

Abstract: A synchronization control apparatus and method enables synchronization control which can flexibly accommodate various frequencies using a simple circuit construction. A storage device that has a predetermined capacity, such as a FIFO, stores externally input data. A CPU controls an output frequency at which data stored in the storage device are output, based on an average frequency which is an average of the output frequency and on a coefficient for setting the average frequency at a fixed value, the first frequency controlling device calculating the average of the output frequency whenever a timing signal is input in accordance with a predetermined cycle and determining the coefficient depending on a free capacity of the storage device at a time of inputting of the timing signal.

Abstract: A digital variable-frequency oscillator has an output frequency thereof variable in dependence upon a frequency control variable. Externally input data are stored in a data storage device, from which the data are generated in accordance with the output of the digital variable-frequency oscillator. A remaining data amount of the data storage device is detected in response to an externally input timing signal that is received in synchronism with the data received by the data storage device such that synchronization is performed based on the timing signal. A filtering operation is performed on values of the frequency control variable so as to calculate an average value of the frequency control variable. A new value of the frequency control variable is calculated based on the calculated average value and the difference between the detected remaining data amount of the data storage device and a target data amount thereof.

Abstract: A digital interface apparatus is provided for use in an analog musical instrument capable of generating an analog audio signal, and is designed for interfacing with an external digital audio apparatus. In the digital interface apparatus, an input/output interface converts the analog audio signal generated by the analog musical instrument into a digital audio signal. The input/output interface has an input terminal and an output terminal for transmitting the digital audio signal to the external digital audio apparatus and for receiving a digital audio signal from the external digital audio apparatus. A digital signal processor processes the digital audio signal which is either converted from the analog audio signal or received from the input terminal. A main controller controls operation of the digital signal processor according to instructions. An operating member is manually operated to provide the instructions to the main controller.

Abstract: In a synchronization control device, received AC 3 coded data or zero data are written into a FIFO buffer in synchronism with bus clock pulses, while yet-to-be-read data are read out from the first-in-first-out buffer. When a difference between the quantity of the yet-to-be-read data in the FIFO buffer and a value represented by synchronization point information is outside an allowable range, a synchronism evaluation section controls a rate of the data readout from the FIFO buffer in such a manner that the difference falls within the allowable range. Synchronization point control section detects leading packet data from among a plurality of successive packet data sequentially arriving in synchronism with the bus clock pulses, and controls the value of the synchronization point information in accordance with a period between the detected leading packet data and next detected leading packet data.

Abstract: A synchronization control apparatus and method enables synchronization control which can flexibly accommodate various frequencies using a simple circuit construction. A storage device that has a predetermined capacity, such as a FIFO, stores externally input data. A CPU controls an output frequency at which data stored in the storage device are output, based on an average frequency which is an average of the output frequency and on a coefficient for setting the average frequency at a fixed value, the first frequency controlling device calculating the average of the output frequency whenever a timing signal is input in accordance with a predetermined cycle and determining the coefficient depending on a free capacity of the storage device at a time of inputting of the timing signal.

Abstract: A frequency control apparatus controls the frequency of an output signal thereof in synchronism with an externally input timing signal. A variable frequency oscillator generates the output signal such that the output signal has a frequency thereof variable in response to a control signal input to the variable frequency oscillator. An input device receives the timing signal. A checking device checks a monitor amount variable in response to the frequency of the output signal from the variable frequency oscillator, in timing in which the timing signal is input. A calculating device calculates a difference between the checked monitor amount and a predetermined desired amount. A control device controls the control signal input to the variable frequency oscillator such that the calculated difference becomes zero.