Abstract: An ion implantation results in defects generated in a nitride semiconductor layer. If the nitride semiconductor layer is set at a particular temperature for a predetermined time period after the ion implantation, the defects may probably be clustering. Provided is a manufacturing method of a semiconductor device including a nitride semiconductor layer comprising: implanting impurities in the nitride semiconductor layer; and increasing a temperature of the nitride semiconductor layer from an initial temperature to a target temperature and annealing the nitride semiconductor layer at the target temperature for a predetermined time period; wherein in the annealing, in at least part of temperature regions below a first temperature between the initial temperature and the target temperature, the nitride semiconductor layer is annealed at a temperature increase speed lower than in a temperature region not lower than the first temperature.

Abstract: When a nitride semiconductor layer into which impurity ions have been implanted is subjected to annealing after a protective film is provided on the nitride semiconductor layer, vacancy defects may be disadvantageously prevented from escaping outside through the surface of the nitride semiconductor layer and disappearing. A manufacturing method of a semiconductor device including a nitride semiconductor layer is provided. The manufacturing method includes implanting impurities into the nitride semiconductor layer, performing a first annealing on the nitride semiconductor layer at a first temperature within an atmosphere of a nitrogen atom containing gas without providing a protective film on the nitride semiconductor layer, forming the protective film on the nitride semiconductor layer after the first annealing, and after the protective film is formed, performing a second annealing on the nitride semiconductor layer at a second temperature that is higher than the first temperature.

Abstract: A method of manufacturing a nitride semiconductor device is provided, comprising: forming, on a substrate, a first laminated body where a first nitride semiconductor layer, a second nitride semiconductor layer and a third nitride semiconductor layer are laminated in this order; subsequent to the forming, removing a partial region of the third nitride semiconductor layer, subsequent to the removing; implanting ions to the first nitride semiconductor layer from the partial region where the third nitride semiconductor layer is removed at least through the second nitride semiconductor layer; and subsequent to the implanting the ions, annealing the first laminated body.

Abstract: When a defect region is present near the pn junction in a GaN layer, lattice defects are present in the depletion layer. Therefore, when a reverse bias is applied to the pn junction, the defects in the depletion layer cause the generated current to flow as a leakage current. The leakage current flowing through the depletion layer can cause a decrease in the withstand voltage at the pn junction. Provided is a semiconductor device using gallium nitride, including a gallium nitride layer including an n-type region. The gallium nitride layer includes a first p-type well region and a second p-type well region that is provided on at least a portion of the first p-type well region and has a peak region with a higher p-type impurity concentration than the first p-type well region.

Abstract: A method for producing a semiconductor device having a nitride-based semiconductor layer includes forming an aluminum nitride layer on a surface of the nitride-based semiconductor layer at a forming temperature and in a growth atmosphere for aluminum nitride; and performing a thermal treatment on the nitride-based semiconductor layer and the aluminum nitride layer, at a treatment temperature that is higher than the forming temperature and in the growth atmosphere for aluminum nitride. For example, an n-GaN layer is formed on an n-GaN substrate, and thereafter the n-GaN layer is doped with an impurity. A cap layer of an epitaxial film made up of AlN is formed, by MOCVD, on the surface of the n-GaN layer. Thermal treatment for activation annealing activates the impurity in the n-GaN layer in an atmosphere that causes AlN to grow, or in an atmosphere in which growth and decomposition of AlN are substantially balanced.

Abstract: In order to improve the dynamic characteristics of a vertical MOSFET using GaN, it is an objective of the present invention to reduce the resistance of a current path with a long hole movement distance in a p-type well. Provided is a vertical MOSFET including a gallium nitride layer having a main surface that is a non-polar surface; a p-type well region that is provided with a stripe shape in the main surface of the gallium nitride layer; and a stripe-shaped electrode provided above the p-type well region. Hole mobility is higher in a direction orthogonal to an extension direction of the stripe-shaped electrode than in the extension direction, among directions in a plane parallel to the main surface.

Abstract: A method of manufacturing a nitride semiconductor device is provided, comprising: forming, on a substrate, a first laminated body where a first nitride semiconductor layer, a second nitride semiconductor layer and a third nitride semiconductor layer are laminated in this order; subsequent to the forming, removing a partial region of the third nitride semiconductor layer, subsequent to the removing; implanting ions to the first nitride semiconductor layer from the partial region where the third nitride semiconductor layer is removed at least through the second nitride semiconductor layer; and subsequent to the implanting the ions, annealing the first laminated body.

Abstract: The region having the surface roughness has nitrogen vacancies, which serve as compensating donors for acceptors and therefore cannot achieve a sufficiently high p-type carrier concentration. In addition, the surface of the GaN-based material may be contaminated as a result of diffusion of impurities from the protective film or insufficient removal of the protective film. Such contamination may adversely affect the subsequent steps or the characteristics of completed devices. A first aspect of the innovations herein provides a method of manufacturing a nitride semiconductor device, including thermally treating a nitride semiconductor layer or removing a film formed on a front surface of the nitride semiconductor layer, and polishing the front surface of the nitride semiconductor layer after the thermally treating or the removing.

Abstract: A method for producing a semiconductor device having a nitride-based semiconductor layer includes forming an aluminum nitride layer on a surface of the nitride-based semiconductor layer at a forming temperature and in a growth atmosphere for aluminum nitride; and performing a thermal treatment on the nitride-based semiconductor layer and the aluminum nitride layer, at a treatment temperature that is higher than the forming temperature and in the growth atmosphere for aluminum nitride. For example, an n-GaN layer is formed on an n-GaN substrate, and thereafter the n-GaN layer is doped with an impurity. A cap layer of an epitaxial film made up of AlN is formed, by MOCVD, on the surface of the n-GaN layer. Thermal treatment for activation annealing activates the impurity in the n-GaN layer in an atmosphere that causes AlN to grow, or in an atmosphere in which growth and decomposition of AlN are substantially balanced.

Abstract: A method for producing a semiconductor device having a nitride-based semiconductor layer includes forming a first nitride-based semiconductor layer of AlxGa1-xN on a base; forming a second nitride-based semiconductor layer of AlyGa1-yN on the first nitride-based semiconductor layer; forming a third nitride-based semiconductor layer of AlzGa1-zN on the second nitride-based semiconductor layer; introducing an impurity using ion implantation into the first, second, and third nitride-based semiconductor layers; and thermally treating, after ion implantation, the first, second, and third nitride-based semiconductor layers, wherein the first, second, and third nitride-based semiconductor layers have respective Al composition ratios x, y, and z, and the Al composition ratio y of the second nitride-based semiconductor layer is higher than the Al composition ratio x of the first nitride-based semiconductor layer, and higher than the Al composition ratio z of the third nitride-based semiconductor layer.

Abstract: A powder magnetic core with improved high frequency magnetic characteristics and reduced eddy current loss is manufactured by a manufacturing method including the steps of (a) providing coated soft magnetic particles which are particles composed of soft magnetic material which each have been coated with an insulating coating, and insulator particles; (b) forming a magnetic layer by press molding the coated soft magnetic particles in a mold assembly; (c) forming an insulator layer on the magnetic layer by press molding the insulator particles in the mold assembly; and (d) repeating the steps (b) and (c) to fabricate a laminate of alternating magnetic layers and insulator layers and provide the powder magnetic core.

Abstract: A method for manufacturing a semiconductor wafer includes the steps of forming, on a first principal surface of a substrate, a compound semiconductor layer different in kind from the substrate, and removing, by etching, a part of the compound semiconductor layer. The part of the compound semiconductor layer is formed on an outer peripheral portion of the first principal surface of the substrate.

Abstract: An insulated transformer, which can suppress aging deterioration and can reduce the influence of noise caused by external magnetic flux, while improving reliability and environmental resistance, and can send and receive signals while electrically insulating a low-voltage side and a high-voltage side. A secondary coil is formed on a semiconductor substrate, and a primary coil is formed on one face of a glass substrate. The primary coil fixes the glass substrate formed on one face onto the semiconductor substrate through the other face of the glass substrate by an adhesive layer.

Abstract: A microminiature power converter includes a semiconductor substrate on which a semiconductor integrated circuit is formed, and a thin magnetic induction element. The magnetic induction element includes a magnetic insulating substrate having first and second principal planes and a plurality of through-holes. A coil is formed on a central region of the magnetic insulating substrate, and electrodes are formed on the first and second principal planes at peripheral regions of the magnetic insulating substrate, and electrically connected to the magnetic insulating substrate via respective through-holes. Wiring is formed on the first principal plane in the central region of the magnetic insulating substrate and connected to a capacitor. One end of the wiring is connected to one of the electrode electrodes, and an insulator layer is provided between the wiring and the coil.

Abstract: An insulating transformer includes a semiconductor substrate, an insulating substrate, a primary winding provided on one of the semiconductor substrate and the insulating substrate, a secondary winding provided on other of the semiconductor substrate and the insulating substrate, and an insulating spacer layer provided in between the semiconductor substrate and the insulating substrate for insulating and separating the primary winding and the secondary winding. The primary winding and the secondary winding are disposed to face each other. The insulating spacer layer maintains a constant interval between the semiconductor substrate and the insulating substrate.

Abstract: In a method for manufacturing a powder magnetic core, magnetic layer green sheets is formed by using magnetic metal particles having an insulating oxide layer on a surface thereof, and insulating layer green sheets are formed by using insulating particles. The magnetic layer green sheet and the insulating layer green sheet are alternately laminated, and the layers are press molded.

Abstract: Two coil conductors of the same spiral shape are cut out from a lead frame. The two coil conductors are disposed back to back so that the front of a first coil conductor is superimposed over the rear of a second coil conductor. Central end portions of the first and second coil conductors are connected to each other through a connection layer. Outer end portions of the spirals of the first and second coil conductors are connected to corresponding ones of first and second terminals of the thin inductor, respectively. A sintered green sheet as a magnetic substance is disposed in gaps between the first and second coil conductors. In this manner, the invention can provide a thin inductor small in size, strong in mechanical strength and inexpensive, a method of producing the thin inductor, and an ultra small size power conversion apparatus using the thin inductor.

Abstract: A multiple output magnetic induction unit includes a magnetic substrate, and a plurality of toroidal coils mounted on the magnetic substrate side by side. No insulating layer is required between the toroidal coils.

Abstract: A method of forming an insulative film includes a step of vacuum laminating an insulative organic material on a substrate that has a peripheral ring electrode formed in a peripheral region of the substrate and a device element(s) formed inside the peripheral region, and has a surface configuration including raised parts. A first dummy pattern is formed in a region between the peripheral ring electrode and the device element on the substrate.

Abstract: An insulating transformer includes a semiconductor substrate, an insulating substrate, a primary winding provided on one of the semiconductor substrate and the insulating substrate, a secondary winding provided on other of the semiconductor substrate and the insulating substrate, and an insulating spacer layer provided in between the semiconductor substrate and the insulating substrate for insulating and separating the primary winding and the secondary winding. The primary winding and the secondary winding are disposed to face each other. The insulating spacer layer maintains a constant interval between the semiconductor substrate and the insulating substrate.