Patents by Inventor Masaharu Kondou

Masaharu Kondou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11440733
    Abstract: Provided is a picking assistance system that can improve work efficiency. A picking assistance system includes: a plurality of movable shelves configured to be able to accommodate at least one article; and a control device configured to control the movement of each of the shelves. The control device causes a series of processes of moving a sorting shelf selected from the shelves to a work station selected from a plurality of work station and moving articles from a deposit shelf disposed at the selected work station to the sorting shelf by a picking operation to be executed repeatedly while changing the work station until the sorting shelf accommodates prescribed articles.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: September 13, 2022
    Assignee: Hitachi Industrial Products, Ltd.
    Inventors: Masaharu Kondou, Ryota Kamoshida, Hiroshi Yoshitake
  • Patent number: 11164274
    Abstract: An article conveyance system includes: a processor; and a storage device accessed by the processor, in which the processor calculates a conveyance time until a conveyance device conveys a shelf being a target for work of taking out or storing an article to a work place where the work on the shelf is performed and a work time until work scheduled to be performed at the work place is ended; and the processor determines whether or not to add an instruction to cause the conveyance device to convey the shelf to the work place based on a difference between the conveyance time and the work time.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: November 2, 2021
    Assignee: HITACHI INDUSTRIAL PRODUCTS, LTD.
    Inventors: Hiroshi Yoshitake, Ryota Kamoshida, Yoshikazu Nagashima, Masaharu Kondou
  • Patent number: 11155412
    Abstract: A warehouse management system includes a controller provided with a storage unit which stores order information that associates items, numbers, and delivery destinations of articles, a warehousing priority calculation unit that determines warehousing priorities of a plurality of items of articles based on the items and quantities of the articles to be delivered to respective delivery destinations, as specified from the order information, and a warehousing instruction unit that outputs an instruction to store the articles based on the warehousing priorities.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: October 26, 2021
    Assignee: HITACHI TRANSPORT SYSTEM, LTD.
    Inventors: Masaharu Kondou, Ryota Kamoshida, Hiroshi Yoshitake, Yoriko Kazama
  • Publication number: 20210192659
    Abstract: A warehouse management system includes a controller provided with a storage unit which stores order information that associates items, numbers, and delivery destinations of articles, a warehousing priority calculation unit that determines warehousing priorities of a plurality of items of articles based on the items and quantities of the articles to be delivered to respective delivery destinations, as specified from the order information, and a warehousing instruction unit that outputs an instruction to store the articles based on the warehousing priorities.
    Type: Application
    Filed: March 2, 2016
    Publication date: June 24, 2021
    Applicant: HITACHI TRANSPORT SYSTEM, LTD.
    Inventors: Masaharu Kondou, Ryota Kamoshida, Hiroshi Yoshitake, Yoriko Kazama
  • Publication number: 20210125138
    Abstract: An order management apparatus executes reception processing to receive at least one order, the number of pieces of the articles to be issued out and delivery destinations of the articles to be issued out; determination processing to determine likelihood of conflict on a specific delivery shelf before the issuing-out operation based on whether, while the issuing-out operation is completed since the specific delivery to store the articles has been transported to a first working station, an instruction on the issuing-out operation for the articles to be issued out from the specific delivery shelf at the second working station occurs; and setting processing to set the number of pieces of the articles to be issued out to be stored within the specific delivery shelf or between the specific delivery shelf and another delivery shelf based on the determination on the likelihood of the conflict on the specific delivery shelf.
    Type: Application
    Filed: March 2, 2016
    Publication date: April 29, 2021
    Applicant: HITACHI TRANSPORT SYSTEM, LTD.
    Inventors: Hiroshi Yoshitake, Yoriko Kazama, Ryota Kamoshida, Masaharu Kondou
  • Publication number: 20200273132
    Abstract: An article conveyance system includes: a processor; and a storage device accessed by the processor, in which the processor calculates a conveyance time until a conveyance device conveys a shelf being a target for work of taking out or storing an article to a work place where the work on the shelf is performed and a work time until work scheduled to be performed at the work place is ended; and the processor determines whether or not to add an instruction to cause the conveyance device to convey the shelf to the work place based on a difference between the conveyance time and the work time.
    Type: Application
    Filed: February 6, 2020
    Publication date: August 27, 2020
    Applicant: HITACHI INDUSTRIAL PRODUCTS, LTD.
    Inventors: Hiroshi YOSHITAKE, Ryota KAMOSHIDA, Yoshikazu NAGASHIMA, Masaharu KONDOU
  • Publication number: 20200231383
    Abstract: Provided is a picking assistance system that can improve work efficiency. A picking assistance system includes: a plurality of movable shelves configured to be able to accommodate at least one article; and a control device configured to control the movement of each of the shelves. The control device causes a series of processes of moving a sorting shelf selected from the shelves to a work station selected from a plurality of work station and moving articles from a deposit shelf disposed at the selected work station to the sorting shelf by a picking operation to be executed repeatedly while changing the work station until the sorting shelf accommodates prescribed articles.
    Type: Application
    Filed: February 19, 2019
    Publication date: July 23, 2020
    Inventors: Masaharu KONDOU, Ryota KAMOSHIDA, Hiroshi YOSHITAKE
  • Publication number: 20190352094
    Abstract: A management system includes: a management apparatus; and a sorting region where articles are sorted to a plurality of sorting destinations, and article data that causes each of articles to correspond to size information about the article, work data that causes one or more articles to be sorted that are sorted to the sorting destinations among the articles to correspond to an article count of the one article or each of the articles to be sorted, and size information about the sorting region are stored in a memory device of the management apparatus.
    Type: Application
    Filed: September 29, 2016
    Publication date: November 21, 2019
    Inventors: Ryota KAMOSHIDA, Yoriko KAZAMA, Masaharu KONDOU, Emi TAKAHASHI, Shinji ASHIZAWA
  • Patent number: 7526716
    Abstract: Embodiment of the invention is to make the number of interleave sequences and the number of redundant bits as small as possible without increasing the number of bits per symbol so much. By encoding data into an error-correcting code by using an algebraic geometric code consisting of an algebraic curve surface having a genus g over a projective plane Pc?1(GF(2m)), where m is a positive integer, the code up to a length of 2m+21+m/2 g is constructed. In particular, by using a “Fermat code,” a version of the algebraic geometric code, consisting of a Fermat curve “C(L): XL+YL+ZL=0” over the P2(GF(22m)), where (m, L)=(5, 11), 4-Kbyte data constituting one sector can be encoded into the code made up of 10-bit symbols.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: April 28, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Masaharu Kondou, Hideki Sawaguchi
  • Publication number: 20070206474
    Abstract: Interlayer crosstalk from a layer (non-readout layer) other than a readout layer, which poses a problem for a next-generation multi-layer optical disk, is reduced. A plurality (t) of tables showing a correspondence between user data and combinations of length, position, and total area of one or a plurality of marks in the user data are used. The possible range of the total mark area is varied depending on the tables. The tables containing user data and combinations of the length, position, and total area of the marks are switched by determining between what values in a number (t-l) of combinations of thresholds of mark areas the total area value of the marks contained in the predetermined number of past data cells (m) falls. The amount of disturbance in mark area is reduced by restricting the range of the area of a subsequent mark that is to appear.
    Type: Application
    Filed: June 30, 2006
    Publication date: September 6, 2007
    Inventors: Masaharu Kondou, Takeshi Maeda
  • Patent number: 7245236
    Abstract: Embodiments of the invention a signal processing method capable of realizing low decoding error ratio by using a simple configuration free from unnecessary redundant bits. In one embodiment, user data (512 bytes+additional data) input to an input terminal is RLL-encoded by a RLL encoder 1. The data from the RLL encoder—1 is entered into a symbol error correction encoder where 9-bit symbol encoding is done. Its RS code portion is RLL-encoded by a RLL encoder—2. Signal read from a magnetic disk is entered into a RLL decoder—2 where the RS code portion is RLL-decoded. The signal from the RLL decoder—2 is then entered into a symbol error correction decoder where random read/write errors, burst errors attributable to defects and other errors are corrected to produce a (user data+RLL) signal. This data is output to an output terminal after being decoded by a RLL decoder—1.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: July 17, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Morishi Izumita, Terumi Takashi, Yasuyuki Itou, Masaharu Kondou
  • Publication number: 20060114137
    Abstract: Embodiments of the invention a signal processing method capable of realizing low decoding error ratio by using a simple configuration free from unnecessary redundant bits. In one embodiment, user data (512 bytes+additional data) input to an input terminal is RLL-encoded by a RLL encoder 1. The data from the RLL encoder—1 is entered into a symbol error correction encoder where 9-bit symbol encoding is done. Its RS code portion is RLL-encoded by a RLL encoder—2. Signal read from a magnetic disk is entered into a RLL decoder—2 where the RS code portion is RLL-decoded. The signal from the RLL decoder—2 is then entered into a symbol error correction decoder where random read/write errors, burst errors attributable to defects and other errors are corrected to produce a (user data+RLL) signal. This data is output to an output terminal after being decoded by a RLL decoder—1.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 1, 2006
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Morishi Izumita, Terumi Takashi, Yasuyuki Itou, Masaharu Kondou
  • Publication number: 20050216818
    Abstract: Embodiment of the invention is to make the number of interleave sequences and the number of redundant bits as small as possible without increasing the number of bits per symbol so much. By encoding data into an error-correcting code by using an algebraic geometric code consisting of an algebraic curve surface having a genus g over a projective plane Pc?1(GF(2m)), where m is a positive integer, the code up to a length of 2m+21+m/2 g is constructed. In particular, by using a “Fermat code,” a version of the algebraic geometric code, consisting of a Fermat curve “C(L): XL+YL+ZL=0” over the P2(GF(22m)), where (m, L)=(5, 11), 4-Kbyte data constituting one sector can be encoded into the code made up of 10-bit symbols.
    Type: Application
    Filed: March 30, 2005
    Publication date: September 29, 2005
    Applicant: Hitachi Global Storage Technologies Netherlands, B. V.
    Inventors: Masaharu Kondou, Hideki Sawaguchi