Patents by Inventor Masaharu Minamizawa
Masaharu Minamizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7754534Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.Type: GrantFiled: April 21, 2008Date of Patent: July 13, 2010Assignee: Fujitsu Semiconductor LimitedInventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20080261336Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.Type: ApplicationFiled: April 21, 2008Publication date: October 23, 2008Applicant: FUJITSU LIMITEDInventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20070114642Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.Type: ApplicationFiled: January 19, 2007Publication date: May 24, 2007Applicant: FUJITSU LIMITEDInventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
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Patent number: 7193320Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.Type: GrantFiled: January 28, 2003Date of Patent: March 20, 2007Assignee: Fujitsu LimitedInventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
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Publication number: 20070004091Abstract: A semiconductor device having high reliability and excellent heat radiation and a method for manufacturing the device at low coat. A semiconductor element and a cover as a heat radiation member are bonded through a solder-containing carbon member having a structure that outside solder layers are formed on a surface of a solder-containing carbon sintered body formed by impregnating a carbon sintered body with solder. By using the sintered body for a junction between the semiconductor element and the cover, thermal stress during heat generation in the semiconductor element can be relieved while securing high heat radiation. By impregnating the sintered body with inexpensive solder, the sintered body and the outside solder layers can be tightly bonded. Through the outside solder layers, the semiconductor element and the cover can be tightly bonded. Thus, the semiconductor device having high reliability and excellent heat radiation can be realized at low cost.Type: ApplicationFiled: December 30, 2005Publication date: January 4, 2007Applicant: FUJITSU LIMITEDInventors: Michiaki Tamagawa, Masaharu Minamizawa
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Patent number: 6995044Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.Type: GrantFiled: August 29, 2003Date of Patent: February 7, 2006Assignee: Fujitsu LimitedInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Atsushi Kikuchi
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Patent number: 6905951Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.Type: GrantFiled: June 8, 2004Date of Patent: June 14, 2005Assignee: Fujitsu LimitedInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
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Patent number: 6875638Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.Type: GrantFiled: March 19, 2002Date of Patent: April 5, 2005Assignee: Fujitsu LimitedInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
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Publication number: 20040232549Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.Type: ApplicationFiled: June 29, 2004Publication date: November 25, 2004Applicant: FUJITSU LIMITEDInventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20040224499Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.Type: ApplicationFiled: June 8, 2004Publication date: November 11, 2004Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
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Patent number: 6794273Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.Type: GrantFiled: December 31, 2002Date of Patent: September 21, 2004Assignee: Fujitsu LimitedInventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
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Patent number: 6781224Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.Type: GrantFiled: October 2, 2002Date of Patent: August 24, 2004Assignee: Fujitsu LimitedInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
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Publication number: 20040053444Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.Type: ApplicationFiled: August 29, 2003Publication date: March 18, 2004Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
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Publication number: 20030222344Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.Type: ApplicationFiled: January 28, 2003Publication date: December 4, 2003Applicant: FUJITSU LIMITEDInventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
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Publication number: 20030219969Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.Type: ApplicationFiled: December 31, 2002Publication date: November 27, 2003Applicant: FUJITSU LIMITEDInventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20030160325Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.Type: ApplicationFiled: October 2, 2002Publication date: August 28, 2003Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
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Patent number: 6566748Abstract: A BGA semiconductor device includes a package substrate carrying thereon a semiconductor chip in a face-down state and a cap member covering the semiconductor chip on the package substrate, wherein the cap member has a optimized Young modulus smaller than about 20 GPa and a thermal conductivity exceeding about 100 W/(m·K).Type: GrantFiled: July 13, 2000Date of Patent: May 20, 2003Assignee: Fujitsu LimitedInventors: Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaharu Minamizawa
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Publication number: 20030082846Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.Type: ApplicationFiled: March 19, 2002Publication date: May 1, 2003Applicant: Fujitsu LimitedInventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
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Patent number: 6347037Abstract: A semiconductor device includes a board and a semiconductor chip which is connected to an upper surface of the board via face-down bonding. The semiconductor device further includes a frame-shape member which is connected to the upper surface of the board with first adhesive, and has an opening to accommodate the semiconductor chip therein, and a plate-shape member which is situated to cover the semiconductor chip and the frame-shape member, and is connected to the semiconductor chip and the frame-shape member with second adhesive, wherein the frame-shape member has such a sufficient sturdiness as to prevent thermal-expansion-induced deformations of the board and the plate-shape member.Type: GrantFiled: November 4, 1998Date of Patent: February 12, 2002Assignee: Fujitsu LimitedInventors: Makoto Iijima, Tetsushi Wakabayashi, Toshio Hamano, Masaharu Minamizawa, Masashi Takenaka, Taturou Yamashita, Masataka Mizukoshi, Masaru Nukiwa, Takao Akai
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Publication number: 20020001178Abstract: A semiconductor device includes a board and a semiconductor chip which is connected to an upper surface of the board via face-down bonding. The semiconductor device further includes a frame-shape member which is connected to the upper surface of the board with first adhesive, and has an opening to accommodate the semiconductor chip therein, and a plate-shape member which is situated to cover the semiconductor chip and the frame-shape member, and is connected to the semiconductor chip and the frame-shape member with second adhesive, wherein the frame-shape member has such a sufficient sturdiness as to prevent thermal-expansion-induced deformations of the board and the plate-shape member.Type: ApplicationFiled: November 4, 1998Publication date: January 3, 2002Inventors: MAKOTO IIJIMA, TETSUSHI WAKABAYASHI, TOSHIO HAMANO, MASAHARU MINAMIZAWA, MASASHI TAKENAKA, TATUROU YAMASHITA, MASATAKA MIZUKOSHI, MASARU NUKIWA, TAKAO AKAI