Patents by Inventor Masaharu Minamizawa

Masaharu Minamizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7754534
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: July 13, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20080261336
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 23, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20070114642
    Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.
    Type: Application
    Filed: January 19, 2007
    Publication date: May 24, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
  • Patent number: 7193320
    Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: March 20, 2007
    Assignee: Fujitsu Limited
    Inventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
  • Publication number: 20070004091
    Abstract: A semiconductor device having high reliability and excellent heat radiation and a method for manufacturing the device at low coat. A semiconductor element and a cover as a heat radiation member are bonded through a solder-containing carbon member having a structure that outside solder layers are formed on a surface of a solder-containing carbon sintered body formed by impregnating a carbon sintered body with solder. By using the sintered body for a junction between the semiconductor element and the cover, thermal stress during heat generation in the semiconductor element can be relieved while securing high heat radiation. By impregnating the sintered body with inexpensive solder, the sintered body and the outside solder layers can be tightly bonded. Through the outside solder layers, the semiconductor element and the cover can be tightly bonded. Thus, the semiconductor device having high reliability and excellent heat radiation can be realized at low cost.
    Type: Application
    Filed: December 30, 2005
    Publication date: January 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Michiaki Tamagawa, Masaharu Minamizawa
  • Patent number: 6995044
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: February 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Atsushi Kikuchi
  • Patent number: 6905951
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: June 14, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Patent number: 6875638
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: April 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
  • Publication number: 20040232549
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Application
    Filed: June 29, 2004
    Publication date: November 25, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20040224499
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Application
    Filed: June 8, 2004
    Publication date: November 11, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Patent number: 6794273
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 21, 2004
    Assignee: Fujitsu Limited
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Patent number: 6781224
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Publication number: 20040053444
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
  • Publication number: 20030222344
    Abstract: A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.
    Type: Application
    Filed: January 28, 2003
    Publication date: December 4, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Sumikazu Hosoyamada, Yoshitsugu Kato, Mitsuo Abe, Kazuto Tsuji, Masaharu Minamizawa, Toshio Hamano, Toshiyuki Honda, Katsuro Hiraiwa, Masashi Takenaka
  • Publication number: 20030219969
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Application
    Filed: December 31, 2002
    Publication date: November 27, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20030160325
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Application
    Filed: October 2, 2002
    Publication date: August 28, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Patent number: 6566748
    Abstract: A BGA semiconductor device includes a package substrate carrying thereon a semiconductor chip in a face-down state and a cap member covering the semiconductor chip on the package substrate, wherein the cap member has a optimized Young modulus smaller than about 20 GPa and a thermal conductivity exceeding about 100 W/(m·K).
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: May 20, 2003
    Assignee: Fujitsu Limited
    Inventors: Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaharu Minamizawa
  • Publication number: 20030082846
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Application
    Filed: March 19, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
  • Patent number: 6347037
    Abstract: A semiconductor device includes a board and a semiconductor chip which is connected to an upper surface of the board via face-down bonding. The semiconductor device further includes a frame-shape member which is connected to the upper surface of the board with first adhesive, and has an opening to accommodate the semiconductor chip therein, and a plate-shape member which is situated to cover the semiconductor chip and the frame-shape member, and is connected to the semiconductor chip and the frame-shape member with second adhesive, wherein the frame-shape member has such a sufficient sturdiness as to prevent thermal-expansion-induced deformations of the board and the plate-shape member.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: February 12, 2002
    Assignee: Fujitsu Limited
    Inventors: Makoto Iijima, Tetsushi Wakabayashi, Toshio Hamano, Masaharu Minamizawa, Masashi Takenaka, Taturou Yamashita, Masataka Mizukoshi, Masaru Nukiwa, Takao Akai
  • Publication number: 20020001178
    Abstract: A semiconductor device includes a board and a semiconductor chip which is connected to an upper surface of the board via face-down bonding. The semiconductor device further includes a frame-shape member which is connected to the upper surface of the board with first adhesive, and has an opening to accommodate the semiconductor chip therein, and a plate-shape member which is situated to cover the semiconductor chip and the frame-shape member, and is connected to the semiconductor chip and the frame-shape member with second adhesive, wherein the frame-shape member has such a sufficient sturdiness as to prevent thermal-expansion-induced deformations of the board and the plate-shape member.
    Type: Application
    Filed: November 4, 1998
    Publication date: January 3, 2002
    Inventors: MAKOTO IIJIMA, TETSUSHI WAKABAYASHI, TOSHIO HAMANO, MASAHARU MINAMIZAWA, MASASHI TAKENAKA, TATUROU YAMASHITA, MASATAKA MIZUKOSHI, MASARU NUKIWA, TAKAO AKAI