Patents by Inventor Masaharu Nishiura
Masaharu Nishiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 5869890Abstract: A Ceramic Bonding Copper (CBC) substrate used in semiconductor modules includes a ceramic plate having foil-shaped copper plates bonded to the ceramic plate by the direct copper bonding method. A circuit pattern is formed on one of the copper plates. The ceramic plate is fabricated by sintering at high temperature an alumina powder compact containing zirconia and one or more of the following additives: yttria, calcia, magnesia, and ceria. The flexural strength and the thermal conductivity of the alumnina ceramic plate of the invention are remarkably improved, facilitating a reduction in the thickness of the ceramic plate. The reduction in thickness of the CBC substrate further improves the ability of the semiconductor device to radiate heat and therefore increases the current carrying capability of the semiconductor device.Type: GrantFiled: September 30, 1997Date of Patent: February 9, 1999Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Akira Morozumi, Tomio Shimizu, Katsumi Yamada, Shigemasa Saito
-
Patent number: 5675181Abstract: A ceramic substrate is a high-temperature fired body consisting of alumina as the main component, zirconia, and a ceramics sintering assisting agent. The assisting agent is one of yttria, calcia, magnesia, and ceria, in which yttria is added at 0.1-2 wt %, calcia is added at 0.02-0.5 wt %, magnesia is added at 0.02-0.4 wt %, and ceria is added at 0.02-0.5 wt %.Type: GrantFiled: January 19, 1996Date of Patent: October 7, 1997Assignees: Fuji Electric Co., Ltd., Sumitomo Metal Ceramics Inc.Inventors: Masaharu Nishiura, Shigemasa Saito, Akira Morozumi, Shizuyasu Yosida, Katumi Yamada, Toshio Nozaki, Hiroshi Miyama, Seigo Oiwa, Kazuya Matuura, Kazuhiko Teramura
-
Patent number: 5576655Abstract: In a high-withstand-voltage integrated circuit, several circuits are included at different potentials. Each circuit of a different potential has a power source, and interface circuits mediate signals between the circuits of different potentials. By this design, the required number of high-withstand-voltage elements is reduced, and a low-cost, high-withstand-voltage IC with high integration density, surge tolerance and stability is obtained.Type: GrantFiled: February 24, 1995Date of Patent: November 19, 1996Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Masaharu Nishiura
-
Patent number: 5561393Abstract: A control device for controlling a double gate semiconductor device having a second gate electrode for controlling transition from a thyristor operation to a transistor operation, and a first gate electrode for controlling transition from transistor operation to an ON/OFF operation, and for controlling a current passing from a collector electrode to an emitter electrode, includes a first gate control circuit for delaying a turn-off signal to the double gate semiconductor device and applying the turn-off signal to the first gate electrode.Type: GrantFiled: October 27, 1994Date of Patent: October 1, 1996Assignee: Fuji Electric Co., Ltd.Inventors: Ken'ya Sakurai, Masahito Otsuki, Noriho Terasawa, Tadashi Miyasaka, Akira Nishiura, Masaharu Nishiura
-
Patent number: 5459339Abstract: A semiconductor device thyristor structure includes a first conductive type collector region, second conductive type and first conductive type base regions, and a second conductive type emitter region. First conductive type regions and second conductive type regions have respective first and second type majority carriers. A first MOSFET injects the second type majority carriers into the second conductive type base region. A second MOSFET is opened and closed independent of the first MOSFET and extracts the first type majority carriers from the first conductive type base region. A third MOSFET has a first gate electrode which is also a gate electrode of the first MOSFET, for extracting the first type majority carriers from the first conductive type base region. First conductive type and second conductive type emitter regions are formed within the first conductive type base region and an emitter voltage can be simultaneously applied to these emitter regions.Type: GrantFiled: April 29, 1993Date of Patent: October 17, 1995Assignee: Fuji Electric Co., Ltd.Inventors: Ken'ya Sakurai, Masahito Otsuki, Noriho Terasawa, Tadashi Miyasaka, Akira Nishiura, Masaharu Nishiura
-
Patent number: 5399916Abstract: In a high-withstand-voltage integrated circuit, several circuits are included at different potentials. Each circuit of a different potential has a power source, and interface circuits mediate signals between the circuits of different potentials. By this design, the required number of high-withstand-voltage elements is reduced, and a low-cost, high-withstand-voltage IC with high integration density, surge tolerance and stability is obtained.Type: GrantFiled: November 18, 1992Date of Patent: March 21, 1995Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Masaharu Nishiura
-
Patent number: 5355123Abstract: An arrangement for detecting overheating of a power integrated circuit includes a power device integrated in a semiconductor substrate and an overheating detection circuit. The overheating detection circuit includes a reverse biased pn junction formed in the same semiconductor substrate as the power device and having a reverse leakage current flow which is temperature dependent, and a voltage converter formed in the same semiconductor substrate as the power device and coupled to the pn junction for producing a voltage depending on the reverse leakage current flow. A threshold circuit is connected for receiving the voltage and producing a signal when the voltage exceeds a threshold voltage to indicate that the power device is overheated.Type: GrantFiled: November 21, 1991Date of Patent: October 11, 1994Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Tatsuhiko Fujihira
-
Patent number: 5349336Abstract: An arrangement for detecting overheating of a power integrated circuit includes a power device integrated in a semiconductor substrate and an overheating detection circuit. The overheating detection circuit includes a reverse biased pn junction formed in the same semiconductor substrate as the power device and having a reverse leakage current flow which is temperature dependent, and a voltage convertor formed in the same semiconductor substrate as the power device and coupled to the pn junction for producing a voltage depending on the reverse leakage current flow. A threshold circuit is connected for receiving the voltage and producing a signal when the voltage exceeds a threshold voltage to indicate that the power device is overheated.Type: GrantFiled: November 24, 1993Date of Patent: September 20, 1994Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Tatsuhiko Fujihira
-
Patent number: 5276370Abstract: A circuit for driving a MOS-type semiconductor device having a source, a gate, and a drain. The circuit includes a MOSFET including a source, a gate, and a drain which is connected through a control circuit to the gate of the MOS-type semiconductor device to be driven, a Zener diode, a diode connected to the Zener diode in reverse series between the gate and the drain of the MOSFET, and a resistor connected between the gate and the source of the MOSFET.Type: GrantFiled: June 10, 1992Date of Patent: January 4, 1994Assignee: Fuji Electric Co., LtdInventors: Masaharu Nishiura, Tatsuhiko Fujihira
-
Patent number: 5043781Abstract: A MOS type semiconductor device including capacitors connected in series between the source electrode and the peripheral electrode. Alternately, a MOS type semiconductor device including constant voltage diodes connected in series between the source electrode and the peripheral electrode.Type: GrantFiled: August 1, 1990Date of Patent: August 27, 1991Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Tatsuhiko Fujihira
-
Patent number: 4999308Abstract: The present invention pertains to a thin film solar cell array that has an increased durability to high temperatures and high humidity. The thin film solar cell includes a transparent insulating substrate on which unit cells are placed in series. The rear electrodes of the unit cells are made of paste material containing conductive particles which may be applied by printing and baking at about 150.degree. C. Further, the present invention achieves low contact resistance to the a-Si layer.Type: GrantFiled: October 17, 1989Date of Patent: March 12, 1991Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Katsumi Yamada
-
Patent number: 4987098Abstract: The present invention relates to a method of producing a metal-oxide semiconductor device with improved capacity for preventing an actuation of a parasitic bipolar transistor. In the present invention, a metal-oxide seminconductor device is produced through a process in which a single conductive semiconductor region with low-impurity density, on top of which region a gate electrode is provided via a gate-insulating film, consists of two sub-layers with different specific resistance. The upper sub-layer of the region has a significantly lower specific resistance than the lower sub-layer of the region. When a lifetime-reducing agent for reducing the reverse-recovery time of a built-in diode is diffused into the single conductive semiconductor region with low-impurity density, the lifetime-reducing agent concentrates in the upper sub-layer of the region, thereby increasing the specific resistance of the upper sub-layer.Type: GrantFiled: August 10, 1989Date of Patent: January 22, 1991Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Kenya Sakurai
-
Patent number: 4968354Abstract: The present invention pertains to a thin film solar cell array that has an increased durability to high temperatures and high humidity. The thin film solar cell includes a transparent insulating substrate on which unit cells are placed in series. The rear electrodes of the unit cells are made of a paste material containing conductive particles and baked at about 150.degree. C. Further, the present invention achieves low contact resistance to the a-Si layer.Type: GrantFiled: November 8, 1988Date of Patent: November 6, 1990Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Katsumi Yamada
-
Patent number: 4954181Abstract: A solar cell module and method of manufacture in which the cell has a transparent substrate, an overlying transparent electrode, a layer of amorphous silicon and a metal electrode. Adjacent cells are connected in series by using a laser to divide the transparent electrode into strips and similarly dividing the metal electrode into overlying strips to define gaps between adjacent strips, with the layer of amorphous silicon lying across the gaps. That overlying portion is then crystallized by a laser beam so as to form a connection between the transparent electrode of one strip and the metal electrode of an adjacent strip.Type: GrantFiled: September 25, 1985Date of Patent: September 4, 1990Assignees: Fuji Electric Company Ltd., Fuji Electric Corporate Research and Development Ltd.Inventors: Masaharu Nishiura, Takeshige Ichimura, Michinari Kamiyama
-
Patent number: 4931873Abstract: An improved linear image sensor of the type having a plurality of linearly arranged photodetecting resistors of amorphous silicon film, leader electrodes individually connected thereto, striped matrix electrodes, and an insulating layer covering the striped matrix electrodes is provided. Each of said leader electrodes are in contact with each of said striped matrix electrodes via a hole formed by patterning in the insulating layer. The insulating layer is made up of a plurality of insulation films laminated one over another by repeating the steps of film forming and patterning. Thus, even though pinholes occur during deposition or patterning of individual layers, there is only a small probability that two or more pinholes will occur at the same place. The risk of short circuits caused by pinholes is therefore substantially reduced.Type: GrantFiled: May 13, 1988Date of Patent: June 5, 1990Assignee: Fuji Electric Co., Ltd.Inventor: Masaharu Nishiura
-
Patent number: 4920392Abstract: There is provided a complementary field effect transistor which includes an insulating substrate having a gate electrode formed thereon, a substantially intrinsic semiconductor thin film covering the insulating substrate such that the gate electrode is formed through the insulating substrate at one side of the intrinsic semiconductor thin film, an island p-type semiconductor thin film and an island n-type semiconductor thin film formed over the intrinsic semiconductor thin film, a first pair of electrodes formed over the p-type semiconductor thin film opposite the gate electrode, and a second pair of electrodes formed over the n-type semiconductor thin film, also, opposite the gate electrode on a same side of the intrinsic semiconductor thin film as the first pair of electrodes. A first electrode of each of the first and second pairs of electrodes are electrically connected with each other to form the complementary field effect transistor.Type: GrantFiled: November 18, 1987Date of Patent: April 24, 1990Assignee: Fuji Electric Co., Ltd.Inventor: Masaharu Nishiura
-
Patent number: 4868623Abstract: An amorphous silicon thin-film p-i-n photodiode array image sensor structure is provided which avoids excessive leakage currents caused by contamination of the side-walls of anisotropically etched amorphous silicon film with conducting materials, such as metal or metal silicide, during fabrication. The present image sensor structure includes a deposited SiO.sub.2 layer that separates all exposed silicon side-walls from directly underlying conductors.Type: GrantFiled: February 17, 1988Date of Patent: September 19, 1989Assignee: Fuji Electric Co., Ltd.Inventor: Masaharu Nishiura
-
Patent number: 4820024Abstract: A liquid crystal matrix display which uses a parallel pair of oppositely-poled diodes in series with the crystal element between the scanning and data electrodes. A circuit arrangement for combining the scanning electrodes, the pixel electrodes and the diodes on a common glass substrate uses insulating layers, opaque metallic layers, and transparent conductive layers in a manner to improve the aperture ratio of the display and to reduce the number of layers needed.Type: GrantFiled: November 10, 1986Date of Patent: April 11, 1989Assignee: Fuji Electric Co., Ltd.Inventor: Masaharu Nishiura
-
Patent number: 4738513Abstract: A liquid crystal display of the active matrix type includes a plurality of row electrodes orthogonal with a row of column electrodes and between each crosspoint is included a series arrangement of a liquid crystal element and a non-linear resistance provided by a parallel pair of oppositely poled diodes. Each of the diodes is constructed to have its photosensitive layer shielded from ambient light by its two electrodes, one of which is larger in cross-section than the light-sensitive layer and the other of which wraps around the edges of the layer.Type: GrantFiled: March 21, 1986Date of Patent: April 19, 1988Assignee: Fuji Electric Co., Ltd.Inventors: Masaharu Nishiura, Tomoyuki Kawashima
-
Patent number: 4728615Abstract: An apparatus and method for producing a thin-film photoelectric transducer. The transducer has a transparent substrate, an amorphous silicon layer and a metal layer; the apparatus has a processing laser for patterning each of the layers. In addition, a separate visible laser is used to detect defects in the layers and the processor laser is then used to correct the defects.Type: GrantFiled: September 16, 1985Date of Patent: March 1, 1988Assignees: Fuji Electric Company Ltd., Fuji Electric Corporate Research and Development Ltd.Inventors: Yoshiyuki Uchida, Masaharu Nishiura, Toshio Hama