Patents by Inventor Masaharu Sasaki

Masaharu Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120573
    Abstract: There is provided a cooling structure between battery cells which allows a temperature rise of adjacent battery cells to be restrained more efficiently even for an appearance of an abnormally heat-generating battery cell. A cooling structure between battery cells disposed side by side so that two side surfaces face each other, the cooling structure between the battery cells includes, formed of plate-shaped metal members each having a thermal conductivity of 100 W/m·K or more and a thickness of 0.3 mm or more, and being in contact with the respective facing side surfaces of the adjacent battery cells, and a heat insulating layer disposed between the plate-shaped metal members, and having a thermal conductivity of 1.0 W/m·K or less and a thickness of 0.
    Type: Application
    Filed: March 31, 2022
    Publication date: April 11, 2024
    Applicant: NIPPON STEEL CORPORATION
    Inventors: Kohei SASAKI, Masaharu IBARAGI, Masafumi USUI, Tatsunori SUNAGAWA
  • Publication number: 20220197130
    Abstract: A photomask excellent in durability and exposure efficiency is provided, which is obtained by a simple manufacturing method at a low cost, exhibits sufficient ESD-suppressing effect, causes no destruction of an exposure pattern, and has satisfactory exposure efficiency. The photomask comprises a light-shielding film formed into a pattern for shielding a photoresist film from exposure to light, formed on a surface of a transparent substrate. A coating layer including a thiophene-based conductive resin is formed on the transparent substrate having the light-shielding film formed thereon. The sheet resistance at a surface of the photomask having the coating layer including a thiophene-based conductive resin is smaller than 1011?/?.
    Type: Application
    Filed: October 31, 2019
    Publication date: June 23, 2022
    Applicants: DIC Corporation, TOPIC Co., LTD.
    Inventors: Takahiro Echigoya, Shinobu Ikeda, Masaharu Sasaki, Yoshinori Katayama
  • Patent number: 8247773
    Abstract: An identification mark constituted of irregularities is formed on the surface of a wafer, which is sealed with a resin layer and a dicing tape may be adhered to the backside. Multiple infrared units irradiate infrared rays towards the surface of the wafer from the backside thereof, wherein they transmit through the wafer and are then reflected at the interface between the resin layer and the surface of the wafer, thus producing reflected rays. An image pickup device picks up an image of the interface including the identification mark based on reflected rays. Optical axes of the infrared units extend to cross the surface of the wafer in different directions; hence, the image pickup device receives only a part of reflected rays, which are reflected at the interface in a prescribed direction. A polarizer can be arranged in proximity to the infrared unit or the image pickup device.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: August 21, 2012
    Assignee: Yamaha Corporation
    Inventors: Masaharu Sasaki, Masayoshi Omura
  • Patent number: 7518217
    Abstract: A semiconductor wafer is manufactured in such a way that a main surface of a semiconductor substrate is partitioned into a plurality of semiconductor element forming regions defined by scribing regions, wherein at least one pattern for measuring a width of a cut region and its positional shift is formed in proximity to a peripheral portion of the semiconductor substrate on a scribing line. The pattern is constituted by a plurality of micro patterns that are aligned in a reverse V-shape to traverse the scribing line and a pair of elongated patterns that partially overlap seal rings formed in both sides of the scribing line. It is possible to form a channel whose width is larger than the width of the cut region on the backside of the semiconductor substrate in correspondence with the scribing region in order to avoid the formation of chipping, cracks, and burrs during cutting.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: April 14, 2009
    Assignee: Yamaha Corporation
    Inventors: Harumitsu Fujita, Masaharu Sasaki
  • Publication number: 20090033912
    Abstract: An identification mark constituted of irregularities is formed on the surface of a wafer, which is sealed with a resin layer and a dicing tape may be adhered to the backside. Multiple infrared units irradiate infrared rays towards the surface of the wafer from the backside thereof, wherein they transmit through the wafer and are then reflected at the interface between the resin layer and the surface of the wafer, thus producing reflected rays. An image pickup device picks up an image of the interface including the identification mark based on reflected rays. Optical axes of the infrared units extend to cross the surface of the wafer in different directions; hence, the image pickup device receives only a part of reflected rays, which are reflected at the interface in a prescribed direction. A polarizer can be arranged in proximity to the infrared unit or the image pickup device.
    Type: Application
    Filed: June 24, 2008
    Publication date: February 5, 2009
    Applicant: YAMAHA CORPORATION
    Inventors: Masaharu Sasaki, Masayoshi Omura
  • Publication number: 20070187514
    Abstract: A reading method and a reading apparatus of an identification mark can read the identification mark even if a principle surface of a wafer on which the identification mark is formed is molded with a resin. In order to achieve this object, a reading apparatus (A) of an identification mark (20) includes: a lighting unit (13) which has a light source (10) that radiates infrared; and an imaging unit (16) which takes an image by receiving reflected light of the infrared radiated on a wafer (1), and the identification mark (20) formed on a principle surface (1c) of the wafer (1) is read by: radiating the infrared from a back face (1b) of the wafer (1) so as to cross an optical axis on the principle surface (1c) of the wafer (1); and taking an image along with receiving reflected light of the infrared after transmitting through the wafer (1) and reflecting on a side of the principle surface.
    Type: Application
    Filed: December 26, 2006
    Publication date: August 16, 2007
    Applicant: Yamaha Corporation
    Inventor: Masaharu Sasaki
  • Publication number: 20070163920
    Abstract: A housing is formed in such a way that a plurality of chip trays each holding a plurality of semiconductor chips are stored in a storage tray, wherein the chip tray is formed by vertically connecting an upper unit and a lower unit, both of which have the same structure. The semiconductor chips are held between the upper unit and the lower unit of the chip tray, thus preventing two-dimensional movement thereof. When a plurality of housings each having the aforementioned structure are vertically combined together, a plurality of semiconductor chips can be further held between the upper unit of one housing and the lower unit of another housing. This makes it possible to simultaneously transport numerous semiconductor chips, whereby the semiconductor chips are each encapsulated in a surface mount chip package.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 19, 2007
    Applicant: YAMAHA CORPORATION
    Inventor: Masaharu Sasaki
  • Publication number: 20060113637
    Abstract: A semiconductor wafer is manufactured in such a way that a main surface of a semiconductor substrate is partitioned into a plurality of semiconductor element forming regions defined by scribing regions, wherein at least one pattern for measuring a width of a cut region and its positional shift is formed in proximity to a peripheral portion of the semiconductor substrate on a scribing line. The pattern is constituted by a plurality of micro patterns that are aligned in a reverse V-shape to traverse the scribing line and a pair of elongated patterns that partially overlap seal rings formed in both sides of the scribing line. It is possible to form a channel whose width is larger than the width of the cut region on the backside of the semiconductor substrate in correspondence with the scribing region in order to avoid the formation of chipping, cracks, and burrs during cutting.
    Type: Application
    Filed: November 9, 2005
    Publication date: June 1, 2006
    Inventors: Harumitsu Fujita, Masaharu Sasaki
  • Patent number: 5273672
    Abstract: The present invention provides a lubricating oil composition characterized in that the base oil contains (A) from 0.05 to 5% by weight of an ester of alkenyl substituted succinic acid and/or an ester of alkyl substituted succinic acid and (B) from 0.005 to 5% by weight of a fatty acid ester of a polyhydric alcohol. The lubricating oil composition of the present invention has a friction characteristic in which the (coefficient of static friction)/(coefficient of dynamic friction) ratio is small and gives only a small shock by shift change. In addition, the changes in the friction characteristics depending on the oil temperature is small and also the changes in the lapse of time are small. Accordingly, it is fully compatible with the trend toward a compact size of transmissions and the like.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: December 28, 1993
    Assignee: Idemitsu Kosan Company Limited
    Inventors: Masashi Dasai, Tsutomu Akita, Masaharu Sasaki