Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor element, an electrode pad of the semiconductor element, a buffer coat film, and a micro-bump. The buffer coat film has an opening corresponding to the electrode pad. The micro-bump is electrically connected to the electrode pad through the opening. A contact area between the micro-bump and side surfaces of the opening is larger than a contact area between the micro-bump and a bottom surface of the opening.

Abstract: According to one embodiment, a semiconductor device includes an electrode pad, a protective layer, a bump, and a resin layer. The electrode pad is formed on a semiconductor substrate. The protective layer includes a pad opening formed in the position of the electrode pad. The bump is formed in the pad opening and electrically connected to the electrode pad. The resin layer has a space provided between the resin layer and the bump and is formed on the protective layer via a metal layer. The resin layer is formed by using an adhesive resin material.

Abstract: According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first plated film in the opening by supplying an electric current to the conducting layer; increasing the interval between an inner side surface of the resist mask forming the opening and the first plated film by setting back the inner side surface; and forming a second plated film in the opening resulting from the setback of the inner side surface to cover the first plated film by supplying an electric current to the conducting layer.

Abstract: According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first plated film in the opening by supplying an electric current to the conducting layer; increasing the interval between an inner side surface of the resist mask forming the opening and the first plated film by setting back the inner side surface; and forming a second plated film in the opening resulting from the setback of the inner side surface to cover the first plated film by supplying an electric current to the conducting layer.

Abstract: There is provided a semiconductor device including a semiconductor chip which includes a semiconductor substrate and a multilayer interconnection structure formed thereon, the multilayer interconnection structure including an interlayer insulating film smaller in relative dielectric constant than an SiO2 film, an encapsulating resin layer which covers a major surface of the semiconductor chip on a side of the multilayer interconnection structure and covers a side surface of the semiconductor chip, and a stress relaxing resin layer which is interposed between the semiconductor chip and the encapsulating resin layer, covers at least a part of an edge of the semiconductor chip on the side of the multilayer interconnection structure, and is smaller in Young's modulus than the encapsulating resin layer.

Abstract: According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first plated film in the opening by supplying an electric current to the conducting layer; increasing the interval between an inner side surface of the resist mask forming the opening and the first plated film by setting back the inner side surface; and forming a second plated film in the opening resulting from the setback of the inner side surface to cover the first plated film by supplying an electric current to the conducting layer.

Abstract: There is provided a semiconductor device including a semiconductor chip which includes a semiconductor substrate and a multilayer interconnection structure formed thereon, the multilayer interconnection structure including an interlayer insulating film smaller in relative dielectric constant than an SiO2 film, an encapsulating resin layer which covers a major surface of the semiconductor chip on a side of the multilayer interconnection structure and covers a side surface of the semiconductor chip, and a stress relaxing resin layer which is interposed between the semiconductor chip and the encapsulating resin layer, covers at least a part of an edge of the semiconductor chip on the side of the multilayer interconnection structure, and is smaller in Young's modulus than the encapsulating resin layer.

Abstract: A carrier sheet for green sheet having a green sheet forming face on which a green sheet is to be formed, comprising: metal foil; and a resin film stacked on a first surface of said metal foil on a side of said green sheet forming face having a smaller thickness than that of said metal foil.

Abstract: A method of manufacturing a semiconductor device according to a first aspect of the present invention includes: forming a first photosensitive resin cured layer including a first opening above a semiconductor substrate, on which a underlying wiring layer is formed, the first opening being made above the underlying wiring layer; forming a second photosensitive resin cured layer including a second opening on the first photosensitive resin cured layer, a bottom of the second opening including an opening top of the first opening; and forming a wiring layer so as to fill in the first and second openings.

Abstract: In a substrate having built-in capacitor which is incorporated in and united with an insulator, the capacitor has a dielectric layer made of a silicon nitride-based ceramic containing silicon carbide in an amount of from 13 to 30% by weight.