Patents by Inventor Masahide Muto

Masahide Muto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100032189
    Abstract: An LED package includes: a molded interconnect device that has an LED chip mounted thereon, and is mounted on a mounting board electrically connected to the LED chip; and a plurality of elastic bodies mounted on the mounting board while interposing solder therebetween. The plurality of elastic bodies hold a position of the molded interconnect device with respect to the mounting board by elastic forces given to an inner surface side of the molded interconnect device from a plurality of outer side surfaces thereof opposite to each other.
    Type: Application
    Filed: February 8, 2008
    Publication date: February 11, 2010
    Applicant: PANASONIC ELECTRIC WORKS CO., LTD.
    Inventors: Masahide Muto, Yoshiyuki Uchinono, Hiroyuki Yoshida, Takashi Shindo, Masahiro Sato, Yutaka Nishira, Norimasa Kaji
  • Patent number: 7495322
    Abstract: A light-emitting device (200) has a submount (100) and a plate for heat transfer (300) having a metallic plate (30). The submount (100) has a mount base (10), at least one light-emitting diode chip (5) mounted thereon and electrically conducting lines (12-17) formed on the mount base (10) to be connected electrically to the light-emitting diode chip (5). A first plane (11) of the mount base (10) of the submount (100) is bonded thermally to the first plate (300). For example, the plate is a circuit board having a metallic plate (30), and the submount (100) is bonded thermally to the metallic plate (30) of the one of the at least one plate (300). In an example, a second plate for heat transfer is also bonded thermally to a second plane of the mount base (100) for providing a plurality of heat transfer paths.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: February 24, 2009
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Takuma Hashimoto, Masaru Sugimoto, Ryoji Yokotani, Koji Nishioka, Yutaka Iwahori, Shinya Ishizaki, Toshiyuki Suzuki, Yoshiyuki Uchinono, Masahide Muto, Satoshi Mori, Hideyoshi Kimura
  • Publication number: 20070007540
    Abstract: A light-emitting device (200) has a submount (100) and a plate for heat transfer (300) having a metallic plate (30). The submount (100) has a mount base (10), at least one light-emitting diode chip (5) mounted thereon and electrically conducting lines (12-17) formed on the mount base (10) to be connected electrically to the light-emitting diode chip (5). A first plane (11) of the mount base (10) of the submount (100) is bonded thermally to the first plate (300). For example, the plate is a circuit board having a metallic plate (30), and the submount (100) is bonded thermally to the metallic plate (30) of the one of the at least one plate (300). In an example, a second plate for heat transfer is also bonded thermally to a second plane of the mount base (100) for providing a plurality of heat transfer paths.
    Type: Application
    Filed: May 26, 2004
    Publication date: January 11, 2007
    Applicant: Matsushita Electric Works, Ltd.
    Inventors: Takuma Hashimoto, Masaru Sugimoto, Ryoji Yokotani, Koji Nishioka, Yutaka Iwahori, Shinya Ishizaki, Toshiyuki Suzuki, Yoshiyuki Uchinono, Masahide Muto, Satoshi Mori, Hideyoshi Kimura
  • Patent number: 6833511
    Abstract: A molded interconnect device (MID) having a multilayer circuit of a reduced thickness, in which a layer-to-layer connection(s) is formed with high reliability, is provided as a multilayer circuit board. The multilayer circuit board comprises a substrate having a first surface and a second surface extending from an end of the first surface at a required angle relative to the first surface, and the multilayer circuit formed on the first surface and composed of a plurality of circuit layers. Each of the circuit layers is provided with a conductive layer having a required circuit pattern and an insulation layer formed on the conductive layer by film formation. The layer-to-layer connection of the multilayer circuit is made through a second conductive layer formed on the second surface of the substrate.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: December 21, 2004
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Yoshiyuki Uchinono, Kazuo Sawada, Yasufumi Masaki, Masahide Muto
  • Publication number: 20020062987
    Abstract: A molded interconnect device (MID) having a multilayer circuit of a reduced thickness, in which a layer-to-layer connection(s) is formed with high reliability, is provided as a multilayer circuit board. The multilayer circuit board comprises a substrate having a first surface and a second surface extending from an end of the first surface at a required angle relative to the first surface, and the multilayer circuit formed on the first surface and composed of a plurality of circuit layers. Each of the circuit layers is provided with a conductive layer having a required circuit pattern and an insulation layer formed on the conductive layer by film formation. The layer-to-layer connection of the multilayer circuit is made through a second conductive layer formed on the second surface of the substrate.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 30, 2002
    Inventors: Yoshiyuki Uchinono, Kazuo Sawada, Yasufumi Masaki, Masahide Muto