Patents by Inventor Masahide Tsukamoto
Masahide Tsukamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7059039Abstract: A method for producing printed wiring boards comprises the steps of perforating through holes at predetermined positions in an adhesive insulator sheet, filling the through holes with a conductive material such as a conductive paste or metal balls, transferring conductive wiring patterns that have been formed on surfaces of releasable supporting sheets onto the surfaces of the adhesive insulator sheet by heat and pressure. Simultaneously, interlayer via-connections are performed by means of the conductive material filled into the through holes.Type: GrantFiled: January 21, 2004Date of Patent: June 13, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahide Tsukamoto, Masanaru Hasegawa, Hideo Hatanaka
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Patent number: 6888072Abstract: A fixture with movable pawls and positioning walls is attached to a circuit board. An electronic component is inserted into the fixture from its upper side. Since the movable pawls move outward due to their slopes, the electronic component is allowed to fit between the positioning walls. After the fitting of the electronic component, the movable pawls hold the sides of the upper face of the electronic component and the positioning walls are in contact with the peripheral walls of the electronic component. Bumps provided on electrode pads of the electronic component are connected to electrodes on the circuit board. Thus, the electronic component can be mounted using the flip chip technique. In addition, the electronic component can be removed easily by moving the movable pawls even after being mounted.Type: GrantFiled: March 16, 2001Date of Patent: May 3, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahide Tsukamoto, Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishi
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Publication number: 20050017268Abstract: An object of the present invention is to provide a display apparatus that has, even when it is a large-sized one, a high manufacturing yield, as well as a simple structure as a whole including wirings.Type: ApplicationFiled: September 9, 2002Publication date: January 27, 2005Inventors: Masahide Tsukamoto, Yoshihiro Bessho, Takeo Ukai
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Publication number: 20040148770Abstract: A method for producing printed wiring boards comprises the steps of perforating through holes at predetermined positions in an adhesive insulator sheet, filling the through holes with a conductive material such as a conductive paste or metal balls, transferring conductive wiring patterns that have been formed on surfaces of releasable supporting sheets onto the surfaces of the adhesive insulator sheet by heat and pressure. Simultaneously, interlayer via-connections are performed by means of the conductive material filled into the through holes.Type: ApplicationFiled: January 21, 2004Publication date: August 5, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masahide Tsukamoto, Masanaru Hasegawa, Hideo Hatanaka
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Patent number: 6748652Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: GrantFiled: March 26, 2003Date of Patent: June 15, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6703565Abstract: A printed wiring board includes at least one insulator sheet having through holes filled with conductive material and a conductive wiring pattern. The wiring pattern is embedded in the insulator sheet so that an upper surface of the wiring pattern and surrounding portions of the insulator sheet form a flat surface. The insulator sheet may be made from a glass-epoxy prepreg or of a polyester or polyimide sheet coated with an adhesive or glue. The wiring pattern can be transferred to the insulator sheet from a surface of a releasable supporting sheet.Type: GrantFiled: October 11, 2000Date of Patent: March 9, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahide Tsukamoto, Masanaru Hasegawa, Hideo Hatanaka
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Patent number: 6683260Abstract: Transmission line structure is composed of a pair of signal conductors which are embedded in one wiring region of a dielectric layer and a thickness in height of the signal conductor is larger than a width, and is constituted so that a coupling impedance between the adjacent signal conductors is lower than a coupling impedance between the signal conductor and another conductor formed in another wiring region, and thus to provide a multi-layer wiring board having a transmission line structure of high wiring density and excellent transmission characteristic.Type: GrantFiled: July 3, 2001Date of Patent: January 27, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Shimamoto, Kazufumi Yamaguchi, Masahide Tsukamoto, Fumikazu Tateishii, Yutaka Taguchi
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Publication number: 20030180512Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: ApplicationFiled: March 26, 2003Publication date: September 25, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6565954Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: GrantFiled: December 1, 2000Date of Patent: May 20, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6532651Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: GrantFiled: February 15, 2000Date of Patent: March 18, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6513236Abstract: Bump components mounted on a circuit board on a supporting substrate is covered with a flexible separation wall. A pressure difference is provided between the inner and outer sides of the separation wall and thus the bump components are pressed against the circuit board. When heating is carried out in this state, the bump components and the circuit board are connected with a conductive adhesive or solder. During the heating, the circuit board is not deformed. Therefore, a bump-component mounted body can be manufactured with high yield.Type: GrantFiled: February 5, 2001Date of Patent: February 4, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masahide Tsukamoto
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Patent number: 6465082Abstract: A stress relaxation type electronic component which is to be mounted on a circuit board, wherein a stress relaxation mechanism member is disposed on a surface of said electronic component, said surface being on a side of a connection portion where said electronic component is to be connected to said circuit board, and said stress relaxation mechanism member is electrically conductive.Type: GrantFiled: May 16, 2000Date of Patent: October 15, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroaki Takezawa, Masahide Tsukamoto, Minehiro Itagaki, Yoshihiro Bessho, Hideo Hatanaka, Yasushi Fukumura, Kazuo Eda, Toru Ishida
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Publication number: 20020041009Abstract: In a transmission line assembly chip for connection between semiconductor chips, strap-like metallic films and dielectric films are alternately arranged in parallel in a transverse direction, so that an aspect ratio of each transmission line conductor is larger than 1. The assembly chip is formed by laminating metallic foils and dielectric films and cutting the same into a specified thickness to achieve favorable matching of characteristic impedances of the transmission lines.Type: ApplicationFiled: July 3, 2001Publication date: April 11, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LtdInventors: Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishii, Masahide Tsukamoto, Takeo Ukai
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Publication number: 20020017963Abstract: Transmission line structure is composed of a pair of signal conductors which are embedded in one wiring region of a dielectric layer and a thickness in height of the signal conductor is larger than a width, and is constituted so that a coupling impedance between the adjacent signal conductors is lower than a coupling impedance between the signal conductor and another conductor formed in another wiring region, and thus to provide a multi-layer wiring board having a transmission line structure of high wiring density and excellent transmission characteristic.Type: ApplicationFiled: July 3, 2001Publication date: February 14, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., Ltd.Inventors: Takeshi Shimamoto, Kazufumi Yamaguchi, Masahide Tsukamoto, Fumikazu Tateishii, Yutaka Taguchi
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Publication number: 20010027876Abstract: A fixture with movable pawls and positioning walls is attached to a circuit board. An electronic component is inserted into the fixture from its upper side. Since the movable pawls move outward due to their slopes, the electronic component is allowed to fit between the positioning walls. After the fitting of the electronic component, the movable pawls hold the sides of the upper face of the electronic component and the positioning walls are in contact with the peripheral walls of the electronic component. Bumps provided on electrode pads of the electronic component are connected to electrodes on the circuit board. Thus, the electronic component can be mounted using the flip chip technique. In addition, the electronic component can be removed easily by moving the movable pawls even after being mounted.Type: ApplicationFiled: March 16, 2001Publication date: October 11, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Masahide Tsukamoto, Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishi
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Patent number: 6281448Abstract: A printed circuit board has: a base material layer having a first via hole; and an insulating layer having a second via hole, the insulating layer being provided on one surface of the base material layer, wherein a cross-sectional area of the second via hole is smaller than a cross-sectional area of said first via hole, and wherein the first and second via holes are filled with a conductive material.Type: GrantFiled: August 10, 1999Date of Patent: August 28, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masahide Tsukamoto
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Publication number: 20010015010Abstract: Bump components mounted on a circuit board on a supporting substrate is covered with a flexible separation wall. A pressure difference is provided between the inner and outer sides of the separation wall and thus the bump components are pressed against the circuit board. When heating is carried out in this state, the bump components and the circuit board are connected with a conductive adhesive or solder. During the heating, the circuit board is not deformed. Therefore, a bump-component mounted body can be manufactured with high yield.Type: ApplicationFiled: February 5, 2001Publication date: August 23, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventor: Masahide Tsukamoto
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Publication number: 20010005545Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: ApplicationFiled: December 1, 2000Publication date: June 28, 2001Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6197407Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.Type: GrantFiled: May 4, 1999Date of Patent: March 6, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
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Patent number: 6195882Abstract: A method for producing printed wiring boards comprises the steps of perforating through holes at predetermined positions in an adhesive insulator sheet, filling the through holes with a conductive material such as a conductive paste or metal balls, transferring conductive wiring patterns that have been formed on surfaces of releasable supporting sheets onto the surfaces of the adhesive insulator sheet by heat and pressure. Simultaneously, interlayer via-connections are performed by means of the conductive material filled into the through holes.Type: GrantFiled: September 5, 1997Date of Patent: March 6, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahide Tsukamoto, Masanaru Hasegawa, Hideo Hatanaka