Patents by Inventor Masahiko Harayama

Masahiko Harayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9418940
    Abstract: Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: August 16, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Masataka Hoshino, Masahiko Harayama, Koji Taya, Naomi Masuda, Masanori Onodera, Ryota Fukuyama
  • Patent number: 8481366
    Abstract: A semiconductor device is provided that includes a semiconductor chip and a resin section that molds the semiconductor chip and has a first through-hole. A through electrode that is electrically coupled to the semiconductor chip, extends through the resin section, and extends between a top edge and a bottom edge of an inner surface of the first through-hole. A cavity which extends between planes corresponding to an upper surface and a lower surface of the resin section is formed inside the first through-hole.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: July 9, 2013
    Assignee: Spansion LLC
    Inventors: Masahiko Harayama, Kouichi Meguro, Junichi Kasai
  • Patent number: 8361857
    Abstract: Embodiments of the present invention are directed to provide a semiconductor device including a semiconductor chip formed of a conductive material, a connector terminal around the semiconductor chip, which is formed of a same material for forming the semiconductor chip, an insulating member for electrically insulating the semiconductor chip from the connector terminal, and a first connection member for electrically coupling the semiconductor chip with the connector terminal. Simplified step of manufacturing the connector terminal may further simplify the steps of manufacturing the semiconductor device.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: January 29, 2013
    Assignee: Spansion LLC
    Inventors: Junji Tanaka, Koji Taya, Masahiko Harayama
  • Publication number: 20120083096
    Abstract: Embodiments of the present invention are directed to provide a semiconductor device including a semiconductor chip formed of a conductive material, a connector terminal around the semiconductor chip, which is formed of a same material for forming the semiconductor chip, an insulating member for electrically insulating the semiconductor chip from the connector terminal, and a first connection member for electrically coupling the semiconductor chip with the connector terminal Simplified step of manufacturing the connector terminal may further simplify the steps of manufacturing the semiconductor device.
    Type: Application
    Filed: December 12, 2011
    Publication date: April 5, 2012
    Inventors: Junji TANAKA, Koji TAYA, Masahiko HARAYAMA
  • Patent number: 8097961
    Abstract: Embodiments of the present invention are directed to provide a semiconductor device including a semiconductor chip formed of a conductive material, a connector terminal around the semiconductor chip, which is formed of a same material for forming the semiconductor chip, an insulating member for electrically insulating the semiconductor chip from the connector terminal, and a first connection member for electrically coupling the semiconductor chip with the connector terminal. Simplified step of manufacturing the connector terminal may further simplify the steps of manufacturing the semiconductor device.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: January 17, 2012
    Assignee: Spansion LLC
    Inventors: Junji Tanaka, Koji Taya, Masahiko Harayama
  • Patent number: 8039943
    Abstract: A semiconductor device is provided that includes a semiconductor chip and a resin section that molds the semiconductor chip and has a first through-hole. A through electrode that is electrically coupled to the semiconductor chip, extends through the resin section, and extends between a top edge and a bottom edge of an inner surface of the first through-hole. A cavity which extends between planes corresponding to an upper surface and a lower surface of the resin section is formed inside the first through-hole.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: October 18, 2011
    Assignee: Spansion, LLC
    Inventors: Masahiko Harayama, Kouichi Meguro, Junichi Kasai
  • Publication number: 20110201152
    Abstract: A semiconductor device is provided that includes a semiconductor chip and a resin section that molds the semiconductor chip and has a first through-hole. A through electrode that is electrically coupled to the semiconductor chip, extends through the resin section, and extends between a top edge and a bottom edge of an inner surface of the first through-hole. A cavity which extends between planes corresponding to an upper surface and a lower surface of the resin section is formed inside the first through-hole.
    Type: Application
    Filed: April 26, 2011
    Publication date: August 18, 2011
    Inventors: Masahiko HARAYAMA, Kouichi MEGURO, Junichi KASAI
  • Patent number: 7846829
    Abstract: A semiconductor device is provided that includes a semiconductor chip, a plurality of solder bumps that electrically couple the semiconductor chip to the outside, and a metal bump being provided on the surface of each first solder bump which is at least a part of the plurality of solder bumps and being made of a metal having a melting point higher than that of the first solder bump. The wettability of the first solder bump is improved as each metal bump serves as a core when the corresponding first solder bump melts. Thus, the connection reliability of the first solder bump can be improved.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: December 7, 2010
    Assignee: Spansion LLC
    Inventors: Junji Tanaka, Masahiko Harayama, Masanori Onodera
  • Publication number: 20090321958
    Abstract: Embodiments of the present invention are directed to provide a semiconductor device including a semiconductor chip formed of a conductive material, a connector terminal around the semiconductor chip, which is formed of a same material for forming the semiconductor chip, an insulating member for electrically insulating the semiconductor chip from the connector terminal, and a first connection member for electrically coupling the semiconductor chip with the connector terminal. Simplified step of manufacturing the connector terminal may further simplify the steps of manufacturing the semiconductor device.
    Type: Application
    Filed: December 22, 2008
    Publication date: December 31, 2009
    Inventors: Junji TANAKA, Koji TAYA, Masahiko HARAYAMA
  • Publication number: 20090250800
    Abstract: A semiconductor device is provided that includes a semiconductor chip and a resin section that molds the semiconductor chip and has a first through-hole. A through electrode that is electrically coupled to the semiconductor chip, extends through the resin section, and extends between a top edge and a bottom edge of an inner surface of the first through-hole. A cavity which extends between planes corresponding to an upper surface and a lower surface of the resin section is formed inside the first through-hole.
    Type: Application
    Filed: September 26, 2008
    Publication date: October 8, 2009
    Inventors: Masahiko HARAYAMA, Kouichi MEGURO, Junichi KASAI
  • Publication number: 20090212423
    Abstract: A semiconductor device is provided that includes a semiconductor chip, a plurality of solder bumps that electrically couple the semiconductor chip to the outside, and a metal bump being provided on the surface of each first solder bump which is at least a part of the plurality of solder bumps and being made of a metal having a melting point higher than that of the first solder bump. The wettability of the first solder bump is improved as each metal bump serves as a core when the corresponding first solder bump melts. Thus, the connection reliability of the first solder bump can be improved.
    Type: Application
    Filed: August 21, 2008
    Publication date: August 27, 2009
    Inventors: Junji TANAKA, Masahiko HARAYAMA, Masanori ONODERA
  • Publication number: 20090115070
    Abstract: A semiconductor device includes a semiconductor chip 10, a connector terminal 30 electrically coupled with the semiconductor chip 10, a resin section 40 for molding the semiconductor chip 10 and the connector terminal 30 such that a lower surface of the semiconductor chip 10 opposite a surface on which a circuit 12 is formed is exposed, and a first chip 20 formed on the semiconductor chip 10 having an upper surface exposed from the resin section and a thermal expansion coefficient smaller than that of the resin section.
    Type: Application
    Filed: October 24, 2008
    Publication date: May 7, 2009
    Inventors: Junji TANAKA, Masahiko Harayama, Masanori Onodera
  • Publication number: 20090115044
    Abstract: Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.
    Type: Application
    Filed: April 25, 2008
    Publication date: May 7, 2009
    Inventors: Masataka HOSHINO, Masahiko HARAYAMA, Koji TAYA, Naomi MASUDA, Masanori ONODERA, Ryota FUKUYAMA
  • Patent number: 6316838
    Abstract: A semiconductor device includes a substrate provided with a plurality of leads, a face-down semiconductor element provided on one surface of the substrate, a first stacked semiconductor element and a second stacked semiconductor element provided on another surface of the substrate and connected to the substrate by wires, and an extended wiring mechanism for connecting electrodes of the face-down semiconductor element and electrodes of the first and second semiconductor elements. The connected electrodes are equi-electrodes whose electrical characteristics are equal.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: November 13, 2001
    Assignee: Fujitsu Limited
    Inventors: Kaname Ozawa, Hayato Okuda, Tetsuya Hiraoka, Mitsutaka Sato, Yuji Akashi, Akira Okada, Masahiko Harayama