Abstract: A semiconductor integrated circuit has a test circuit in which signal pad (15) to input a switching signal TM is formed on a non-mounting surface of a LSI and one group of signal pads (11 to 13) formed on the non-mounting surface and signal pads (16 to 18) formed on a mounting surface is selected based on a signal level of the switching signal TM.

Abstract: A semiconductor integrated circuit has a test circuit in which signal pad (15) to input a switching signal TM is formed on a non-mounting surface of a LSI and one group of signal pads (11 to 13) formed on the non-mounting surface and signal pads (16 to 18) formed on a mounting surface is selected based on a signal level of the switching signal TM.

Abstract: A device under test (DUT) board for testing is electrically connected to a solder ball of a package. A contactor of the board is directly attached to the solder ball. Thus, there is little influence by bouncing of a power source and ground, even when an LSI under test is operated at high speed and low voltage, and malfunctions are rare.

Abstract: A semiconductor integrated circuit, in which an input buffer, an output buffer, and an input/output buffer connected to signal pins respectively each as an object for a DC test are connected to a single DC test pin through discretely provided switches, all the switches are OFF in an ordinary state, and when the DC test is to be performed, the switches are successively turned ON one by one in a state where the DC test pin is connected to an LSI tester. With the operation, various types of DC test such as a pin contest, an input leak test and an output voltage test can be performed by using a LSI tester having a smaller number of pins than a number of pins in an LSI without requiring a connection such that the signal pins as objects for the test are in one-to-one correspondence with the pin electronics in the LSI tester.

Abstract: A bare chip (1) is rectangular, and has a front surface (1a) on the center of which semiconductor elements are integrated and a back surface. Notches (2) are formed on a side of the bare chip (1) according to the kind of the semiconductor elements integrated on the bare chip (1). The notches (2) are oblong and extend through the bare chip (1) from the front surface (1a) to the back surface. For example, assuming that the notch (2) represents "1" and a portion without the notch (2) represents "0", one-bit information is obtained according to the presence or absence of the notch (2). When detection of several portions is made, binary information according to a detection result, i.e., information regarding the type of the bare chip (1), is obtained. For detection of the presence or absence of the notch (2), the bare chip (1) is irradiated with light, and then whether the light goes through the notch (2) or is intercepted by the bare chip (1) is detected.

Abstract: A semiconductor integrated device including a first circuit block, a second circuit block, a first supply interconnection connected to the first circuit block to supply power thereto, a second supply interconnection connecting the first supply interconnection to the second circuit block, and a switch inserted across the first and second supply interconnections. The switch has a structure equivalent to a plurality of switching elements disposed in parallel on a substrate. The switch is opened by a break command output from the first circuit block so that the second supply interconnection is disconnected from the first supply interconnection, thereby preventing a standby current from flowing to the second circuit block when it is unused. This can solve a problem of a conventional semiconductor integrated device in that the standby current flowing to the second circuit block wastes power even if the second block is not used.