Patents by Inventor Masahiko Kondow
Masahiko Kondow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090225804Abstract: A semiconductor laser comprises an active section for generating light, and a peripheral section as resonator for producing laser light from the generated light, and includes an InP substrate. The active section has a lower cladding layer formed of AlInAs or AlGaInAs, a core layer including an active layer formed of AlGaInAs or InGaAsP, and an upper cladding layer formed of AlInAs or AlGaInAs. The peripheral section has a first cladding layer formed by oxidizing AlInAs or AlGaInAs, a core layer, and a second clad layer formed by oxidizing AlInAs or AlGaInAs, and a two-dimensional photonic crystal defined by an array of regularly spaced apart holes the peripheral section.Type: ApplicationFiled: February 25, 2009Publication date: September 10, 2009Applicants: MITSUBISHI ELECTRIC CORPORATION, OSAKA UNIVERSITYInventors: Yoshifumi Sasahata, Keisuke Matsumoto, Toshitaka Aoyagi, Masahiko Kondow, Masato Morifuji, Hideki Momose
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Patent number: 6782032Abstract: In a semiconductor laser for emitting light perpendicular to substrate crystal, including, on the substrate crystal, an active layer for generating light, a cavity structure sandwiching the active layer by reflecting mirrors so as to obtain a laser beam from the light generated from the active layer, and a regrown semiconductor layer between the active layer and one of the reflecting mirrors, a regrown interface or a face very close to the regrown interface is formed by a thin film containing dopants of high concentration. With the configuration, an adverse influence of a contamination deposit on the regrown interface is eliminated by delta-doping the regrown interface. The cost is reduced and device resistance is also reduced to 50 &OHgr; or less. Thus, an edge emitting laser (VCSEL) for realizing a optical module achieving a high speed characteristic over 10 Gb/s is obtained.Type: GrantFiled: May 28, 2002Date of Patent: August 24, 2004Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Takeshi Kitatani, Makoto Kudo
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Patent number: 6697405Abstract: A surface emitting laser device comprising, on a semiconductor substrate, an active region for generating light, a current confinement region disposed on the side opposite to the semiconductor substrate relative to the active region, an optical cavity comprising reflectors putting the active region and the current confinement region vertically therebetween in the direction of layering the semiconductor layer, a first electrode disposed on the side of the semiconductor substrate relative to the current confinement region and a second electrode disposed on the side opposite to the semiconductor layer relative to the current confinement region, and having a layered structure capable of forming 2-dimensional carriers between the current confinement region and the second electrode, in which a current flowing from the electrode to the current confinement region has a component in the horizontal direction relative to the surface of the substrate and is conducted mainly by way of the channel for the 2-dimensional carType: GrantFiled: February 20, 2001Date of Patent: February 24, 2004Assignee: Hitachi, Ltd.Inventors: Takeshi Kitatani, Masahiko Kondow, Toshiaki Tanaka
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Publication number: 20030103516Abstract: In a surface-emitting laser comprising an active region for emitting light and upper and lower DBR's sandwiching this active region from below and above to form resonators, a plurality of selective oxidation layers having an aperture which is an unoxidized region are formed in the upper DBR, lower DBR or both of them and the aperture is made wider stepwise as it becomes farther from the active region, thereby greatly reducing the capacitance of the laser. A high-speed optical module comprising the above surface-emitting laser as a light source has high performance, long service life and is inexpensive.Type: ApplicationFiled: July 3, 2002Publication date: June 5, 2003Applicant: Hitachi, Ltd.Inventors: Takeshi Kitatani, Masahiko Kondow, Makoto Kudo, Shinichi Nakatsuka, Masahiro Aoki
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Publication number: 20020176465Abstract: In a semiconductor laser for emitting light perpendicular to substrate crystal, including, on the substrate crystal, an active layer for generating light, a cavity structure sandwiching the active layer by reflecting mirrors so as to obtain a laser beam from the light generated from the active layer, and a regrown semiconductor layer between the active layer and one of the reflecting mirrors, a regrown interface or a face very close to the regrown interface is formed by a thin film containing dopants of high concentration. With the configuration, an adverse influence of a contamination deposit on the regrown interface is eliminated by delta-doping the regrown interface. The cost is reduced and device resistance is also reduced to 50 &OHgr; or less. Thus, an edge emitting laser (VCSEL) for realizing a optical module achieving a high speed characteristic over 10 Gb/s is obtained.Type: ApplicationFiled: May 28, 2002Publication date: November 28, 2002Applicant: Hitachi, Ltd.Inventors: Masahiko Kondow, Takeshi Kitatani, Makoto Kudo
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Publication number: 20020075921Abstract: A surface emitting laser device comprising, on a semiconductor substrate, an active region for generating light, a current confinement region disposed on the side opposite to the semiconductor substrate relative to the active region, an optical cavity comprising reflectors putting the active region and the current confinement region vertically therebetween in the direction of layering the semiconductor layer, a first electrode disposed on the side of the semiconductor substrate relative to the current confinement region and a second electrode disposed on the side opposite to the semiconductor layer relative to the current confinement region, and having a layered structure capable of forming 2-dimensional carriers between the current confinement region and the second electrode, in which a current flowing from the electrode to the current confinement region has a component in the horizontal direction relative to the surface of the substrate and is conducted mainly by way of the channel for the 2-dimensional carType: ApplicationFiled: February 20, 2001Publication date: June 20, 2002Inventors: Takeshi Kitatani, Masahiko Kondow, Toshiaki Tanaka
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Patent number: 5937274Abstract: A fabrication process for a semiconductor device including a plurality of semiconductor layers, the plurality of semiconductor layers including at least a nitrogen-containing alloy semiconductor Al.sub.a Ga.sub.b In.sub.1-a-b N.sub.x P.sub.y As.sub.z Sb.sub.1-x-y-z (0.ltoreq.a.ltoreq.1, 0.ltoreq.b.ltoreq.1, 0<x<1, 0.ltoreq.y<1, 0.ltoreq.z<1), and a method of making the semiconductor device and apparatus. For at least two semiconductor layers out of the plurality of semiconductor layers, a value of lattice strain of said at least two semiconductor layers is set at less than a critical strain at which misfit dislocations are generated at an interface between said two adjacent semiconductor layers. In a method for manufacturing a semiconductor device, Al, Ga, In, N, P, As and Sb as materials are prepared as materials for a semiconductor device, and a plurality of semiconductor layers are epitaxially grown by using said materials, including a layer of nitrogen-containing alloy semiconductor Al.sub.Type: GrantFiled: December 18, 1997Date of Patent: August 10, 1999Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Kazuhisa Uomi, Hitoshi Nakamura
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Patent number: 5912913Abstract: Disclosed is a vertical cavity surface emitting laser providing mirrors at least one of which has a high reflectivity to be obtained with a small number of pairs each comprising a semiconductor low-refractivity layer and a semiconductor high-refractivity layer, (1) in which GaAs is used for a substrate and Al, In and P are used as main elements for making the low-refractivity layers lattice-matching the GaAs substrate; (2) in which Ga, In, N and As are used as main elements of the high-refractivity layers; (3) in which GaAs is used for a substrate, Ga, In, N and As are used as main elements for making an active layer and the mirrors lattice-match the GaAs substrate.Type: GrantFiled: December 19, 1996Date of Patent: June 15, 1999Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Kazunori Shinoda, Kazuhisa Uomi, Shinji Nishimura
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Patent number: 5300793Abstract: A hetero crystalline structure consisting of semiconductor materials of a zincblende-structure and wurtzite-structure. For example, formed on a semiconductor substrate having a crystal face of (100) of the zincblende structure is a semiconductor material of the wurtzite-structure in its bulk state as a film of the same zincblende-structure as the semiconductor substrate.Type: GrantFiled: May 19, 1993Date of Patent: April 5, 1994Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Shigekazu Minagawa, Takashi Kajimura
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Patent number: 5157679Abstract: An optielectronic device comprising a substrate crystal whose crystal plane is a (n11) plane tilted from the (100) plane toward the [110] direction, or [110] direction where (n>1). When the substrate is applied to an AlGaInP semiconductor laser, the optical device can be cleaved into a rectangular shape, as in the case of a (100) substrate crystal, resulting in easy handling of the chips and also is effective for making the lasting wavelength shorter, lowering the threshold current density for lasing, improving the continuous lasing temperature, etc. Furthermore, semiconductor lasers of different lasing wavelengths can be prepared under good control. Furthermore, a doping efficiency having no dependence on a tilt angle can be obtained by proper selection of a dopant. For example, Si is suitable as an n-type dopant entering sites of group III atom on an (n11) A plane (n.gtoreq.2).Type: GrantFiled: January 16, 1991Date of Patent: October 20, 1992Assignee: Hitachi-Ltd.Inventors: Masahiko Kondow, Toshihiro Kawano, Shigekazu Minagawa, Shin Satoh, Kenji Uchida, Toshiaki Tanaka, Takashi Kajimura
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Patent number: 4841531Abstract: A semiconductor laser having a double hetero structure comprises a cladding layer of In.sub.1-x-y Ga.sub.x Al.sub.y P.sub.1-z As.sub.z (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.z.ltoreq.0.5, 0.5.ltoreq.x+y.ltoreq.1) and an active layer of a strained-layer-superlattice of In.sub.1-x-y Ga.sub.x Al.sub.y P.sub.1-z As.sub.z (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.z.ltoreq.1, 0.ltoreq.x+y.ltoreq.1) system, thus enabling the lasing of wavelength ranges from infra-red to green.Type: GrantFiled: February 11, 1988Date of Patent: June 20, 1989Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Shin Satoh, Shigekazu Minagawa, Akio Ohishi, Takashi Kajimura
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Patent number: 4794606Abstract: An opto-electronic device has an atomic layer superlattice semiconductor comprising different semiconductor materials periodically piled up, each material having an atomic layer thickness. The superlattice semiconductor has a bandgap different from an alloy semiconductor having equivalently the same composition as the former. In a semiconductor laser, as clad layers, the atomic layer superlattice semiconductor having equivalently the same composition as a Zn.sub.0.42 Cd.sub.0.58 S alloy semiconductor and a larger bandgap than the later is used, and a ZnSe.sub.0.94 S.sub.0.06 alloy semiconductor as an active layer is located between the cladding layers. The double-hetero structure semiconductor laser thus provided can perform the lasing at 470 nm at room temperature.Type: GrantFiled: March 24, 1988Date of Patent: December 27, 1988Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Shigekazu Minagawa, Takashi Kajimura
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Patent number: RE41336Abstract: A fabrication process for a semiconductor device including a plurality of semiconductor layers, the plurality of semiconductor layers including at least a nitrogen-containing alloy semiconductor AlaGabIn1-a-bNxPyAszSb1-x-y-z (0?a?1, 0?b?1, 0<x<1, 0?y<1, 0?z<1), and a method of making the semiconductor device and apparatus. For at least two semiconductor layers out of the plurality of semiconductor layers, a value of lattice strain of said at least two semiconductor layers is set at less than a critical strain at which misfit dislocations are generated at an interface between said two adjacent semiconductor layers.Type: GrantFiled: January 2, 2003Date of Patent: May 18, 2010Assignee: Opnext Japan, IncInventors: Masahiko Kondow, Kazuhisa Uomi, Hitoshi Nakamura