Abstract: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.

Abstract: An integrated circuit device includes at least one data driver block for driving data lines, a plurality of control transistors TC1 and TC2, each of the control transistors being provided corresponding to each output line of the data driver block and controlled by using a common control signal, and a pad arrangement region in which data driver pads P1 and P2 for electrically connecting the data lines and the output lines QL1 and QL2 of the data driver block are disposed. The control transistors TC1 and TC2 are disposed in the pad arrangement region.

Abstract: A semiconductor integrated circuit includes N pad rows in which pads are respectively arranged, and electrostatic discharge protection elements disposed in a lower layer of the N pad rows and connected with each pad in the N pad rows. The electrostatic discharge protection elements are disposed in a lower layer of regions at least partially including each of the N pads.

Abstract: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.

Abstract: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.

Abstract: An integrated circuit device includes a display memory and a data read control circuit. The data read control circuit controls data reading so that data of pixels corresponding to a plurality of signal lines is read out by N-time reading in one horizontal scan period of a display panel (N is an integer larger than 1). The display memory includes a plurality of sense amplifier cells respectively connected with a plurality of bitlines. L sense amplifier cells (L is an integer larger than 1) respectively connected with the bitlines of L memory cells adjacent in a first direction (wordline direction) in which wordlines extend are disposed along a second direction (bitline direction) in which the bitlines extend.

Abstract: In an integrated circuit device, a data line driver block which drives data lines of a display panel based on data supplied from a RAM block from which data is read N times (N is an integer larger than one) in one horizontal scan period 1H of the display panel includes first to N-th divided data line driver blocks disposed along a first direction in which bitlines extend. When data supplied from the RAM block is M bits (M is an integer larger than 1) and grayscale of a pixel corresponding to the data line is G bits, each of the first to N-th divided data line driver blocks includes (M/G) (multiple of three) data line driver cells which drive (M/G) data lines. (M/3G) R data line driver cells are provided in a first subdivided driver, (M/3G) G data line driver cells are provided in a second subdivided driver, and (M/3G) B data line driver cells are provided in a third subdivided driver.

Abstract: A semiconductor integrated circuit includes N pad rows in which pads are respectively arranged, and electrostatic discharge protection elements disposed in a lower layer of the N pad rows and connected with each pad in the N pad rows. The electrostatic discharge protection elements are disposed in a lower layer of regions at least partially including each of the N pads.

Abstract: An integrated circuit device includes a display memory and a data read control circuit. The data read control circuit controls data reading so that data of pixels corresponding to a plurality of signal lines is read out by N-time reading in one horizontal scan period of a display panel (N is an integer larger than 1). The display memory includes a plurality of sense amplifier cells respectively connected with a plurality of bitlines. L sense amplifier cells (L is an integer larger than 1) respectively connected with the bitlines of L memory cells adjacent in a first direction (wordline direction) in which wordlines extend are disposed along a second direction (bitline direction) in which the bitlines extend.

Abstract: Each of RAM blocks provided in a display memory and disposed along a first direction in which bitlines extend includes a sense amplifier circuit which outputs M-bit data upon one wordline selection (M is an integer larger than 1). At least M memory cells are arranged in each of the RAM blocks along a second direction in which wordlines extend. M sense amplifier cells to which M-bit data read from the M memory cells is input are provided in the sense amplifier circuit. L sense amplifier cells of the M sense amplifier cells are disposed at a position corresponding to L memory cells adjacent in the second direction (L is an integer which satisfies 2?L<M/2). When the height of the memory cell in the second direction is denoted by MCY and the height of the sense amplifier cell in the second direction is denoted by SACY, “(L?1)×MCY<SACY?L×MCY” is satisfied.

Abstract: In an integrated circuit device, a data line driver block which drives data lines of a display panel based on data supplied from a RAM block from which data is read N times (N is an integer larger than one) in one horizontal scan period 1H of the display panel includes first to N-th divided data line driver blocks disposed along a first direction in which bitlines extend. When data supplied from the RAM block is M bits (M is an integer larger than 1) and grayscale of a pixel corresponding to the data line is G bits, each of the first to N-th divided data line driver blocks includes (M/G) (multiple of three) data line driver cells which drive (M/G) data lines. (M/3G) R data line driver cells are provided in a first subdivided driver, (M/3G) G data line driver cells are provided in a second subdivided driver, and (M/3G) B data line driver cells are provided in a third subdivided driver.

Abstract: An integrated circuit device includes at least one data driver block for driving data lines, a plurality of control transistors TC1 and TC2, each of the control transistors being provided corresponding to each output line of the data driver block and controlled. by using a common control signal, and a pad arrangement region in which data driver pads P1 and P2 for electrically connecting the data lines and the output lines QL1 and QL2 of the data driver block are disposed. The control transistors TC1 and TC2 are disposed in the pad arrangement region.

Abstract: An integrated circuit device includes a data driver block DB, a memory block MB, and a logic circuit block LB. The data driver block DB includes a data driver DR and a buffer circuit BF which buffers a driver control signal from the logic circuit block LB and outputs the buffered driver control signal to the data driver DR. The memory block MB includes a memory cell array MA and a row address decoder RD which selects a wordline. The data driver block DB and the memory block MB are disposed along a direction D1, the buffer circuit BF and the data driver DR are disposed along a direction D2, the row address decoder RD and the memory cell array MA are disposed along the direction D2, and the buffer circuit BF and the row address decoder RD are disposed along the direction D1.

Abstract: An integrated circuit device includes a driver macrocell in which a plurality of circuit blocks are integrated into a macrocell. The driver macrocell includes a data driver block DB for driving data lines, a memory block MB which stores image data, and a pad block PDB in which pads for electrically connecting output lines of the data driver block DB with the data lines are disposed. The data driver block DB and the memory block MB are disposed along a direction D1, and the pad block PDB is disposed on the D2 side of the data driver block DB and the memory block MB.

Abstract: An integrated circuit device includes a data driver block for driving data lines. The data driver block includes a plurality of subpixel driver cells, each of which outputs a data signal corresponding to image data of one subpixel. When a direction along the long side of the subpixel driver cell is a direction D1 and a direction perpendicular to the first direction is a direction D2, the subpixel driver cells are disposed in the data driver block along the direction D1 and the direction D2. Pads are disposed on the D2 side of the data driver block. A rearrangement wiring region for rearranging the order of pull-out lines of output signals from the subpixel driver cells is provided in the arrangement region of the subpixel driver cells.

Abstract: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.

Abstract: Disclosed is a microphone that can be highly integrated and can be manufactured easily. A light emission element and a light-receiving element mounted on a substrate are sealed with transparent resin, a groove is formed in the sealed portion between the light emission element and the light-receiving element, an optically non-transparent substance is inserted in the groove, and the optically non-transparent substance is adhered to the groove with transparent resin. Thereby, in comparison to the conventional method of cutting the sealed portion together with the substrate, forming an optically non-transparent film on the cut surface, and reintegrating the cut areas, with the present invention, the number of the alignment processes is reduced and the extra margin for the setting process is no longer unnecessary.

Abstract: Disclosed are 5,11-Dihydrodibenzo[b,e][1,4]oxazepine derivatives such as (R)-(+)-5,11-dihydro-5-[1-(4-methoxyphenethyl)-2-pyrrolidinylmethyl]dibenzo[b,e][1,4]oxazepine and (R)-(+)-5,11-dihydro-5-[1-(4-fluorophenethyl)-2-pyrrolidinylmethyl]dibenzo[b,e][1,4]oxazepine, stereoisomers thereof, pharmacologically acceptable salts thereof, or hydrates thereof and a pharmaceutical composition conating the 5,11-Dihydrodibenzo[b,e][1,4]oxazepine derivatives. The derivatives have an excellent activity of improving a digestive tract moving function and are free of side effect.

Abstract: A microphone comprising a membrane and a vibration sensing section provided with an air flowing hole independently of the outer periphery of the vibration sensing section. The air flowing hole is conventionally provided continuously from the outer periphery of the vibration sensing section to the inside.

Abstract: Provided is a microphone with a stable output employing an aluminum membrane and having an air escape provided to the vibration detector. Specifically, the material used as the membrane frame material has a larger Young's modulus and a smaller thermal expansion coefficient than those of aluminum. Thereby, even if stress distribution or heat distribution is inflicted on the membrane frame, the slack or tension in the membrane will be reduced and the microphone output is stabilized.