Patents by Inventor Masahiko Niwayama

Masahiko Niwayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11366022
    Abstract: A semiconductor device is provided that includes a temperature sensing function that accurately senses a temperature. The semiconductor device includes a first semiconductor layer on a semiconductor substrate, and a temperature sensor. The temperature sensor includes: a sensing-body region of a second conductivity type that is disposed in the first semiconductor layer; a first region of a first conductivity type, and a second region of the first conductivity type that are arranged in the sensing-body region and are apart from each other; and a third region of the second conductivity type that is in the sensing-body region and is between the first region and the second region. A concentration of a first conductivity type impurity in the temperature-sensing conductive layer is higher than a concentration of a first conductivity type impurity in the drift region.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: June 21, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Ohoka, Masahiko Niwayama, Masao Uchida
  • Publication number: 20200191661
    Abstract: A semiconductor device is provided that includes a temperature sensing function that accurately senses a temperature. The semiconductor device includes a first semiconductor layer on a semiconductor substrate, and a temperature sensor. The temperature sensor includes: a sensing-body region of a second conductivity type that is disposed in the first semiconductor layer; a first region of a first conductivity type, and a second region of the first conductivity type that are arranged in the sensing-body region and are apart from each other; and a third region of the second conductivity type that is in the sensing-body region and is between the first region and the second region. A concentration of a first conductivity type impurity in the temperature-sensing conductive layer is higher than a concentration of a first conductivity type impurity in the drift region.
    Type: Application
    Filed: November 20, 2019
    Publication date: June 18, 2020
    Inventors: Atsushi OHOKA, Masahiko NIWAYAMA, Masao UCHIDA
  • Patent number: 9209262
    Abstract: This silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; a gate insulating layer which is arranged over the silicon carbide semiconductor layer and which includes a silicon oxide film; a gate electrode which is arranged on the gate insulating layer; and a carbon transition layer which is interposed between the silicon carbide semiconductor layer and the silicon oxide film and which has a carbon atom concentration is 10% to 90% of a carbon atom concentration of the silicon carbide semiconductor layer. In a region of the carbon transition layer which is located closer to the silicon oxide film than a position where a nitrogen atom concentration becomes the highest is, a ratio of an integral of nitrogen atom concentrations to an integral of carbon atom concentrations is equal to or greater than 0.11.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: December 8, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Koutarou Tanaka, Masao Uchida, Masahiko Niwayama, Osamu Kusumoto
  • Publication number: 20150303271
    Abstract: This silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; a gate insulating layer which is arranged over the silicon carbide semiconductor layer and which includes a silicon oxide film; a gate electrode which is arranged on the gate insulating layer; and a carbon transition layer which is interposed between the silicon carbide semiconductor layer and the silicon oxide film and which has a carbon atom concentration is 10% to 90% of a carbon atom concentration of the silicon carbide semiconductor layer. In a region of the carbon transition layer which is located closer to the silicon oxide film than a position where a nitrogen atom concentration becomes the highest is, a ratio of an integral of nitrogen atom concentrations to an integral of carbon atom concentrations is equal to or greater than 0.11.
    Type: Application
    Filed: December 3, 2013
    Publication date: October 22, 2015
    Inventors: Koutarou TANAKA, Masao UCHIDA, Masahiko NIWAYAMA, Osamu KUSUMOTO
  • Patent number: 9029874
    Abstract: A semiconductor device includes a first cell and a second cell. Each of the first cell and the second cell includes a first silicon carbide semiconductor layer including a first region and a second region provided in the first region, a second silicon carbide semiconductor layer provided on and in contact with the first silicon carbide semiconductor layer, a first ohmic electrode in ohmic contact with the second region, and an insulating film provided on the second silicon carbide semiconductor layer. The first cell includes a gate electrode, and the second cell includes no electrode configured to control the electric potential of the second silicon carbide semiconductor layer independently of the electric potential of the first ohmic electrode.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Nobuyuki Horikawa, Masao Uchida, Masahiko Niwayama
  • Patent number: 8878194
    Abstract: A method for fabricating a semiconductor element according to the present disclosure includes the steps of: (A) forming a first silicon carbide semiconductor layer of a first conductivity type on a semiconductor substrate; (B) forming a first mask to define a body region on the first silicon carbide semiconductor layer; (C) forming a body implanted region of a second conductivity type in the first silicon carbide semiconductor layer using the first mask; (D) forming a sidewall on side surfaces of the first mask; (E) defining a dopant implanted region of the first conductivity type and a first body implanted region of the second conductivity type in the first silicon carbide semiconductor layer using the first mask and the sidewall; and (F) thermally treating the first silicon carbide semiconductor layer.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: November 4, 2014
    Assignee: Panasonic Corporation
    Inventors: Masahiko Niwayama, Masao Uchida
  • Publication number: 20140231828
    Abstract: A semiconductor device includes a first cell and a second cell. Each of the first cell and the second cell includes a first silicon carbide semiconductor layer including a first region and a second region provided in the first region, a second silicon carbide semiconductor layer provided on and in contact with the first silicon carbide semiconductor layer, a first ohmic electrode in ohmic contact with the second region, and an insulating film provided on the second silicon carbide semiconductor layer. The first cell includes a gate electrode, and the second cell includes no electrode configured to control the electric potential of the second silicon carbide semiconductor layer independently of the electric potential of the first ohmic electrode.
    Type: Application
    Filed: September 12, 2013
    Publication date: August 21, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Nobuyuki Horikawa, Masao Uchida, Masahiko Niwayama
  • Patent number: 8772788
    Abstract: A semiconductor device disclosed in the present application includes: a semiconductor substrate; a first silicon carbide semiconductor layer located on a principal surface of the semiconductor substrate, the first silicon carbide semiconductor layer including a drift region of a first conductivity type, a body region of a second conductivity type, and an impurity region of a first conductivity type; a trench provided in the first silicon carbide semiconductor layer so as to reach inside of the drift region; a second silicon carbide semiconductor layer of the first conductivity type located at least on a side surface of the trench so as to be in contact with the impurity region and the drift region; a gate insulating film; a gate electrode; a first ohmic electrode; and a second ohmic electrode.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: July 8, 2014
    Assignee: Panasonic Corporation
    Inventors: Ryo Ikegami, Masao Uchida, Yuki Tomita, Masahiko Niwayama
  • Patent number: 8754422
    Abstract: A semiconductor device 100 includes: a first silicon carbide layer 120 arranged on the principal surface of a semiconductor substrate 101; a first impurity region 103 of a first conductivity type arranged in the first silicon carbide layer; a body region 104 of a second conductivity type; a contact region 131 of the second conductivity type which is arranged at a position in the body region that is deeper than the first impurity region 103 and which contains an impurity of the second conductivity type at a higher concentration than the body region; a drift region 102 of the first conductivity type; and a first ohmic electrode 122 in ohmic contact with the first impurity region 103 and the contact region 131, wherein: a contact trench 121, which penetrates through the first impurity region 103, is provided in the first silicon carbide layer 120; and the first ohmic electrode 122 is arranged in the contact trench 121 and is in contact with the contact region 131 on at least a portion of a side wall lower portio
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: June 17, 2014
    Assignee: Panasonic Corporation
    Inventors: Chiaki Kudou, Kenya Yamashita, Masahiko Niwayama
  • Patent number: 8748901
    Abstract: This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: June 10, 2014
    Assignee: Panasonic Corporation
    Inventors: Kunimasa Takahashi, Masahiko Niwayama, Masao Uchida, Chiaki Kudou
  • Publication number: 20140151719
    Abstract: This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface.
    Type: Application
    Filed: February 4, 2014
    Publication date: June 5, 2014
    Applicant: Panasonic Corporation
    Inventors: Kunimasa TAKAHASHI, Masahiko NIWAYAMA, Masao UCHIDA, Chiaki KUDOU
  • Publication number: 20140110723
    Abstract: A semiconductor device disclosed in the present application includes: a semiconductor substrate; a first silicon carbide semiconductor layer located on a principal surface of the semiconductor substrate, the first silicon carbide semiconductor layer including a drift region of a first conductivity type, a body region of a second conductivity type, and an impurity region of a first conductivity type; a trench provided in the first silicon carbide semiconductor layer so as to reach inside of the drift region; a second silicon carbide semiconductor layer of the first conductivity type located at least on a side surface of the trench so as to be in contact with the impurity region and the drift region; a gate insulating film; a gate electrode; a first ohmic electrode; and a second ohmic electrode.
    Type: Application
    Filed: April 23, 2012
    Publication date: April 24, 2014
    Applicant: Panasonic Corporation
    Inventors: Ryo Ikegami, Masao Uchida, Yuki Tomita, Masahiko Niwayama
  • Patent number: 8686439
    Abstract: This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: April 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Kunimasa Takahashi, Masahiko Niwayama, Masao Uchida, Chiaki Kudou
  • Patent number: 8653535
    Abstract: A semiconductor device according to the present invention includes a contact region 201 of a second conductivity type which is provided in a body region 104. The contact region 201 includes a first region 201a in contact with a first ohmic electrode 122 and a second region 201b located at a position deeper than that of the first region 201a and in contact with the body region 104. The first region 201a and the second region 201b each have at least one peak of impurity concentration. The peak of impurity concentration in the first region 201a has a higher value than that of the peak of impurity concentration in the second region 201b.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: February 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Chiaki Kudou, Masahiko Niwayama, Ryo Ikegami
  • Publication number: 20130328065
    Abstract: A method for fabricating a semiconductor element according to the present disclosure includes the steps of: (A) forming a first silicon carbide semiconductor layer of a first conductivity type on a semiconductor substrate; (B) forming a first mask to define a body region on the first silicon carbide semiconductor layer; (C) forming a body implanted region of a second conductivity type in the first silicon carbide semiconductor layer using the first mask; (D) forming a sidewall on side surfaces of the first mask; (E) defining a dopant implanted region of the first conductivity type and a first body implanted region of the second conductivity type in the first silicon carbide semiconductor layer using the first mask and the sidewall; and (F) thermally treating the first silicon carbide semiconductor layer.
    Type: Application
    Filed: September 3, 2012
    Publication date: December 12, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Masahiko Niwayama, Masao Uchida
  • Publication number: 20130140586
    Abstract: This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface.
    Type: Application
    Filed: June 25, 2012
    Publication date: June 6, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Kunimasa Takahashi, Masahiko Niwayama, Masao Uchida, Chiaki Kudou
  • Publication number: 20130082285
    Abstract: A semiconductor device according to the present invention includes a contact region 201 of a second conductivity type which is provided in a body region 104. The contact region 201 includes a first region 201a in contact with a first ohmic electrode 122 and a second region 201b located at a position deeper than that of the first region 201a and in contact with the body region 104. The first region 201a and the second region 201b each have at least one peak of impurity concentration. The peak of impurity concentration in the first region 201a has a higher value than that of the peak of impurity concentration in the second region 201b.
    Type: Application
    Filed: August 29, 2011
    Publication date: April 4, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Chiaki Kudou, Masahiko Niwayama, Ryo Ikegami
  • Publication number: 20120205670
    Abstract: A semiconductor device 100 includes: a first silicon carbide layer 120 arranged on the principal surface of a semiconductor substrate 101; a first impurity region 103 of a first conductivity type arranged in the first silicon carbide layer; a body region 104 of a second conductivity type; a contact region 131 of the second conductivity type which is arranged at a position in the body region that is deeper than the first impurity region 103 and which contains an impurity of the second conductivity type at a higher concentration than the body region; a drift region 102 of the first conductivity type; and a first ohmic electrode 122 in ohmic contact with the first impurity region 103 and the contact region 131, wherein: a contact trench 121, which penetrates through the first impurity region 103, is provided in the first silicon carbide layer 120; and the first ohmic electrode 122 is arranged in the contact trench 121 and is in contact with the contact region 131 on at least a portion of a side wall lower portio
    Type: Application
    Filed: October 19, 2010
    Publication date: August 16, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Chiaki Kudou, Kenya Yamashita, Masahiko Niwayama
  • Patent number: 8222107
    Abstract: A method of producing a semiconductor device according to the present invention includes: a step of implanting an impurity into a semiconductor layer 2 by using a first implantation mask layer 30, thereby forming a body region 6; a step of implanting an impurity by using the first implantation mask layer 30 and a second implantation mask layer 31, thereby forming a contact region 7 within the body region 6; a step of forming a third implantation mask layer 32, and thereafter selectively removing the second implantation mask layer 31; a step of forming a side wall 34 on a side face of the first implantation mask layer 30; and a step of implanting an impurity to form a source region 8 within the body region 6.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: July 17, 2012
    Assignee: Panasonic Corporation
    Inventors: Koutarou Tanaka, Masahiko Niwayama, Masao Uchida
  • Patent number: 8058631
    Abstract: A semiconductor manufacturing includes: an ion source and a beam line for introducing an ion beam into a target film which is formed over a wafer with an insulating film interposed therebetween; a flood gun for supplying the target film with electrons for neutralizing charges contained in the ion beam; a rotating disk for subjecting the target film to mechanical scanning of the ion beam in two directions composed of r-? directions; a rear Faraday cage for measuring the current density produced by the ion beam; a disk-rotational-speed controller and a disk-scanning-speed controller for changing the scanning speed of the target film; and a beam current/current density measuring instrument for controlling, according to the current density, the scanning speed of the target film.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: November 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Masahiko Niwayama, Kenji Yoneda