Patents by Inventor Masahiko Yanagisawa

Masahiko Yanagisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having tape carrier with bendable region
    Patent number: 7687317
    Abstract: A tape carrier includes: a base film with insulating property; a wiring pattern provided on the base film within a product region, the product region being demarcated by a cutting line so as to divide the tape carrier into individual products by cutting along the tape carrier along the cut line; and a solder resist provided on the base film so as to cover the wiring pattern. The solder resist protrudes outward from within the product region.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: March 30, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa
  • TAPE CARRIER, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20080237815
    Abstract: A tape carrier includes: a base film with insulating property; a wiring pattern provided on the base film within a product region, the product region being demarcated by a cutting line so as to divide the tape carrier into individual products by cutting along the tape carrier along the cut line; and a solder resist provided on the base film so as to cover the wiring pattern. The solder resist protrudes outward from within the product region.
    Type: Application
    Filed: March 21, 2008
    Publication date: October 2, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Masahiko YANAGISAWA
  • Flexible interconnect substrate of a tape-shaped semiconductor device, semiconductor device and circuit board
    Patent number: 6744120
    Abstract: A flexible interconnect substrate (1) comprises a tape-shaped base substrate (10) and a plurality of interconnect patterns (20) formed on the base substrate (10). The base substrate (10) bas a plurality of first regions (44) met to be punched out, and second regions (45) between those first regions (44). Each of the second regions (45) has the material that forms the base substrate (10) is present in a central portion in the widthwise direction of the base substrate (10), and a low-bending-resistance portion (40) for ensuring that the second region (45) bends more readily than the adjacent first regions (44) in a direction in which the longitudinal axis of the base substrate (10) bends.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: June 1, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa
  • Flexible interconnecting substrate and method of manufacturing the same, film carrier, tape-shaped semiconductor device, semiconductor device, circuit board, and electronic equipment
    Patent number: 6555755
    Abstract: A flexible interconnecting substrate comprises a base substrate of an elongate form and interconnecting patterns formed on the base substrate, where each of the interconnecting patterns has a plurality of interconnects and each of the interconnects has a portion that extends to the right and a portion that extends to the left, with respect to the longitudinal axis of the base substrate. Each interconnecting pattern has narrow portions and that narrow in the widthwise direction of the base substrate and wide portions and that broaden in the widthwise direction of the base substrate.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: April 29, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa
  • Flexible interconnecting substrate, film, carrier, tape-shaped semiconductor device, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
    Patent number: 6509630
    Abstract: The flexible interconnecting substrate (1) has a tape-shaped base substrate (10), a plurality of interconnecting patterns (20) formed on a base substrate (10), and a plurality of reinforcing sections (40) formed on the base substrate 10. The plurality of reinforcing sections (40) is formed along the longitudinal direction of the base substrate (10), and at least part of each of the interconnecting patterns (20) is formed at a position away from each of the reinforcing sections (40) in the widthwise direction of the base substrate (10).
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: January 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa
  • Tape carrier and tape carrier device using the same
    Patent number: 6066888
    Abstract: In a tape carrier, one or a plurality of overhang patterns, each being shorter than a length that reaches an edge of a semiconductor chip, is provided in an area where the pitch between adjacent inner leads is relatively large or in a corner area of the device hole where inner leads are not provided, depending upon the size of such area. An average of resin sealing ranges on the rear surface of the tapes is 0.8 mm and the diversification is 0.06 mm.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: May 23, 2000
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa
  • Tape carrier and tape carrier device using the same
    Patent number: 5949134
    Abstract: In a tape carrier, one or a plurality of overhang patterns, each being shorter than a length that reaches an edge of a semiconductor chip, is provided in an area where the pitch between adjacent inner leads is relatively large or in a corner area of the device hole where inner leads are not provided, depending upon the size of such area. An average of resin sealing ranges on the rear surface of the tapes is 0.8 mm and the diversification is 0.06 mm.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: September 7, 1999
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Yanagisawa