Patents by Inventor Masahiro Aoike
Masahiro Aoike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153704Abstract: A capacitor including a lower layer electrode, a dielectric film, and an upper layer electrode sequentially laminated on a partial area of an upper surface serving as one surface of a substrate formed from a compound semiconductor from a side closest to the substrate is disposed. A coating formed from an insulating metal oxide or a silicon oxide is disposed on or above the dielectric film. When the upper surface is viewed in a plan, the coating extends throughout an edge of the lower layer electrode from an area inside the edge of the lower layer electrode to an area outside the edge.Type: ApplicationFiled: November 7, 2023Publication date: May 9, 2024Applicant: Murata Manufacturing Co., Ltd.Inventors: Hiroaki TOKUYA, Masayuki AOIKE, Masahiro SHIBATA
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Patent number: 8013639Abstract: A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare the respective current values of the first and second currents and to output a voltage showing the comparison result. Oxide films of MOS transistors of the current comparison circuit are thinner than oxide films of MOS transistors of the voltage-to-current conversion circuit.Type: GrantFiled: December 21, 2010Date of Patent: September 6, 2011Assignee: Panasonic CorporationInventor: Masahiro Aoike
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Publication number: 20110089976Abstract: A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare the respective current values of the first and second currents and to output a voltage showing the comparison result. Oxide films of MOS transistors of the current comparison circuit are thinner than oxide films of MOS transistors of the voltage-to-current conversion circuit.Type: ApplicationFiled: December 21, 2010Publication date: April 21, 2011Applicant: PANASONIC CORPORATIONInventor: Masahiro AOIKE
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Patent number: 7880511Abstract: A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare the respective current values of the first and second currents and to output a voltage showing the comparison result. Oxide films of MOS transistors of the current comparison circuit are thinner than oxide films of MOS transistors of the voltage-to-current conversion circuit.Type: GrantFiled: March 11, 2009Date of Patent: February 1, 2011Assignee: Panasonic CorporationInventor: Masahiro Aoike
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Publication number: 20090243662Abstract: A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare the respective current values of the first and second currents and to output a voltage showing the comparison result. Oxide films of MOS transistors of the current comparison circuit are thinner than oxide films of MOS transistors of the voltage-to-current conversion circuit.Type: ApplicationFiled: March 11, 2009Publication date: October 1, 2009Inventor: Masahiro AOIKE
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Patent number: 7417461Abstract: An LVDS output circuit steadily supplying an output current of magnitude I includes a current source 101 outputting a current of 2I, current sources 102, 103, 106, 107 allowing a current of ?I to flow therethrough, and current sources 104, 105 allowing a current of I??I to flow therethrough. Switches 117, 118 switch the polarity of the output depending on an input signal 116. At the time of polarity transition, switches 108, 109 are OFF while switches 110, 111 are ON. The output amplitude is thus (I+?I). Alternatively, the switches 108, 109 are ON while the switches 110, 111 are OFF. The output amplitude is thus (?I??I). That is, although the balance of currents flowing through the current sources 102 to 107 changes permitting preemphasis, the total of the currents flowing through the current sources 102 to 107, i.e., power consumption is kept constant. This speeds up signal transmission and minimizes power supply noise.Type: GrantFiled: June 3, 2005Date of Patent: August 26, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masahiro Aoike
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Publication number: 20070279121Abstract: An LVDS output circuit steadily supplying an output current of magnitude I includes a current source 101 outputting a current of 2I, current sources 102, 103, 106, 107 allowing a current of ?I to flow therethrough, and current sources 104, 105 allowing a current of I??I to flow therethrough. Switches 117, 118 switch the polarity of the output depending on an input signal 116. At the time of polarity transition, switches 108, 109 are OFF while switches 110, 111 are ON. The output amplitude is thus (I+?I). Alternatively, the switches 108, 109 are ON while the switches 110, 111 are OFF. The output amplitude is thus (?I??I). That is, although the balance of currents flowing through the current sources 102 to 107 changes permitting preemphasis, the total of the currents flowing through the current sources 102 to 107, i.e., power consumption is kept constant. This speeds up signal transmission and minimizes power supply noise.Type: ApplicationFiled: June 3, 2005Publication date: December 6, 2007Inventor: Masahiro Aoike
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Patent number: 7215157Abstract: First, second and third current generators, and first and second switching devices are provided. Current values of the first and second current generators are equal to each other and a current value of the third current generator is twice as large as the current value of the first and second current generators. The first current generator and the third current generator are connected to each other through the first switching device, and the second current generator and the third current generator are connected to each other through the second switching device. A first output is taken out from a node between the first switching device and the first current generator, and a second output is taken out from a node between the second switching device and the second current generator.Type: GrantFiled: July 13, 2004Date of Patent: May 8, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masahiro Aoike
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Publication number: 20050110530Abstract: A differential output circuit which performs data transmission by means of a differential current comprises: a first current source for outputting an electric current to the outside of the circuit; a second current source for introducing an electric current from the outside of the circuit; an output polarity switching circuit for switching the polarity of the differential current generated by the first and second current sources; a voltage source for supplying a predetermined voltage; and a resistor connected between a predetermined node and the voltage source, the predetermined node being interposed between the first and second current sources.Type: ApplicationFiled: November 16, 2004Publication date: May 26, 2005Inventors: Masahiro Aoike, Yoshinori Miyada, Takahiro Bokui
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Publication number: 20050083101Abstract: First, second and third current generators, and first and second switching devices are provided. Current values of the first and second current generators are equal to each other and a current value of the third current generator is twice as large as the current value of the first and second current generators. The first current generator and the third current generator are connected to each other through the first switching device, and the second current generator and the third current generator are connected to each other through the second switching device. A first output is taken out from a node between the first switching device and the first current generator, and a second output is taken out from a node between the second switching device and the second current generator.Type: ApplicationFiled: July 13, 2004Publication date: April 21, 2005Inventor: Masahiro Aoike