Patents by Inventor Masahiro Hashimoto

Masahiro Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010001613
    Abstract: To provide an apparatus for embedding watermark data according to the frequency-domain method efficiently into video data, a video-data encoder of the invention for performing encoding of an original video data into a compressed data stream having a multi-layer structure comprises; means (101) for transforming the original video data into a sequence of processing units of frequency domain data; means (103) for embedding predetermined watermark data into at least one unit of the sequence of processing units; and means (104 and 105) for generating the compressed data stream by processing the sequence of processing units. Therefore, the data transformation of the original video data into the frequency domain data for embedding the watermark data can be performed efficiently without any additional process, by exploiting the data transformation for encoding the original video data into the compressed data stream.
    Type: Application
    Filed: February 23, 1998
    Publication date: May 24, 2001
    Inventor: MASAHIRO HASHIMOTO
  • Patent number: 4779192
    Abstract: A vector processor for sequentially reading out elements of a plurality of vector operands and sequentially storing the results of operations to the vector operands, comprising: operand counters for indicating the element numbers for every operand; address registers for every operand; a first comparator for comparing each element of the vector; maximum number registers for storing the maximum numbers of elements of the respective operands; a second comparator for comparing the operand counter of each operand with the content of the maximum number registers of each operand with respect to each operand; and a control circuit for independently updating the operand counters and operand address registers of ech operand in response to all of or parts of the outputs of the first and second comparators.
    Type: Grant
    Filed: December 21, 1984
    Date of Patent: October 18, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Shunichi Torii, Keiji Kojima, Masahiro Hashimoto
  • Patent number: 4667325
    Abstract: A scanning control apparatus operates to scan-in arbitrary data to data storage elements such as registers, flip-flops and memory devices in an information processing system, and also scan-out data held in the data storage elements. The data storage elements are provided with physical scanning addresses determined in accordance with the arrangement of packaging, and further provided with logical scanning addresses. In the scanning operation for storage elements, a logical scanning address is given, and the scanning control apparatus transforms the logical scanning address into physical scanning addresses, by which storage elements rendered scan-in or scan-out are selected.
    Type: Grant
    Filed: February 10, 1984
    Date of Patent: May 19, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Kitano, Katsuro Wakai, Masahiro Hashimoto
  • Patent number: 4654785
    Abstract: An information processing system having a plurality of arithmetic units such as a general instruction arithmetic unit and a floating point instruction arithmetic unit comprises means provided for each of the arithmetic units, for generating a condition code for use in branch judgement of a conditional branch instruction, branch judgement means provided in each arithmetic unit for judging success or failure of a branch of the conditional branch instruction by using the condition generated by the respective code generating means, and a judgement unit decision circuit responsive to the operation state of each arithmetic unit for generating an instruction signal indicating which of the judging means is to be operated to and supplying it to the branch judgement means, whereby branch control is carried out by using either one of the branch judgement results obtained in the respective arithmetic units as a valid one.
    Type: Grant
    Filed: August 3, 1984
    Date of Patent: March 31, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Takaaki Nishiyama, Masahiro Hashimoto
  • Patent number: 4639886
    Abstract: An arithmetic system includes an arithmetic unit of a pipeline structure for executing arithmetic operations for instructions which require different arithmetic cycles. The arithmetic unit executes N arithmetics in pipeline for N instruction at maximum. Initiation of arithmetic operation for a new instruction in the arithmetic unit is indicated by an indicator which detects that each of the instruction executed in the arithmetic is N cycles before completion of the execution and allows arithmetic operation for the new instruction to be initiated in the succeeding cycle.
    Type: Grant
    Filed: June 29, 1983
    Date of Patent: January 27, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Hashimoto, Tsuyoshi Watanabe, Kenichi Wada
  • Patent number: 4618349
    Abstract: A grinding wheel comprising abrasive grains each of which is coated with a conductive material and a non-conductive binder interposed among said abrasive grains. The amount of said conductive material ranges from 30 to 80% by weight based on said abrasive grains. The abrasive grains coated with said conductive material is contained in said grindstone in an amount ranging from 33 to 64% by volume. A method of producing said grinding wheel is also proposed. The method comprises preparing a mixture of said coated abrasive grains and said non-conductive binder, filling the mixture into a mold and molding said mixture by applying a pressure while maintaining said mixture at a constant temperature.
    Type: Grant
    Filed: May 9, 1983
    Date of Patent: October 21, 1986
    Assignees: Tokyo Shibaura Denki Kabushiki Kaisha, Osaka Kongo Seito Co., Ltd.
    Inventors: Masahiro Hashimoto, Hideo Tani
  • Patent number: 4561863
    Abstract: A grinding wheel which comprises a number of abrasive grains coated with an electrically conductive material, an electrically non-conductive bond having a number of diamond filler dispersed therein. A method of producing the grinding wheel which comprises preparing a mixture of coated abrasive grains, non-conductive bond and diamond filler, filling the mixture into a mold and molding said mixture by applying a pressure while maintaining said mixture at a constant temperature.
    Type: Grant
    Filed: June 26, 1984
    Date of Patent: December 31, 1985
    Assignees: Kabushiki Kaisha Toshiba, Osaka Kongo Seito Co.
    Inventors: Masahiro Hashimoto, Hideo Tani
  • Patent number: 4385365
    Abstract: A data shunting and recovering device is provided to shunt and hold the data stored in a register and its address before writing the register during a delay period following generation of an interrupt. This data is then restored into the register when an instruction of recovering is given. Therefore, it is allowed to achieve the moderating effects of delaying the stopping of the stage advance in data processing upon generation of an instruction for interruption without loss of data stored in the memory prior to writing during this delay period.
    Type: Grant
    Filed: February 8, 1979
    Date of Patent: May 24, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Hashimoto, Kenichi Wada, Chikahiko Izumi
  • Patent number: 4051461
    Abstract: In a memory hierarchy system comprising a main memory for storing data and a buffer memory for holding a part of the data stored in the main memory as a copy of the main memory data, the data on the buffer memory is frequently replaced by the data on the main memory so as to hold in the buffer memory the data which is very frequently used. The buffer memory also holds the data which is in an area of the main memory where an irremediable fault occurred and that data is prevented from being replaced. Therefore, the buffer memory is substituted for the fault area of the main memory so that a fail soft system is attained.
    Type: Grant
    Filed: April 27, 1976
    Date of Patent: September 27, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Hashimoto, Kenichi Furumaya