Abstract: An injection molding machine management system includes an injection molding machine, a first detecting section configured to detect at least one of a physical quantity of the injection molding machine and a physical quantity of a molded article, an on-premise server, and a Cloud server. The Cloud server includes a first storing section configured to store information concerning at least one of the physical quantity of the injection molding machine and the physical quantity of the molded article detected by the first detecting section and a virtual machine configured to generate a control rule for the injection molding machine based on the information.

Abstract: An object of the present invention is to achieve an improved flash memory which enables to simultaneously obtain high performance and reliability even with voltage V.sub.CC of 3.3 V or below. The device includes a memory cell 6, a V.sub.CC type transistor 7 and a V.sub.PP type transistor 8. Memory cell 6 includes a tunnel oxide film 2, a floating gate 3 and a control gate 4. A V.sub.CC type transistor 7 includes a first gate insulating film 9 and a first gate 10. A V.sub.PP type transistor 8 includes a second gate insulating film 11 and a second gate 12. An inequality, t(V.sub.CC)<t(TN)<t(V.sub.PP), is satisfied where t(TN) is the thickness of the tunnel oxide film, t(V.sub.CC) is the thickness of the first gate insulating film, and t(V.sub.PP) is the thickness of the second gate insulating film.

Abstract: A dynamic type semiconductor device comprises a memory cell array including a plurality of cell groups, each of the cell groups including four adjacent memory cells disposed in a point symmetry fashion, with a single contact hole formed at the center of the point symmetry to be common to the four memory cells, in which the four memory cells and bit lines are connected through the single contact hole.

Abstract: A semiconductor memory device comprises four memory cells (4a, 6) arranged in point symmetry on a semiconductor substrate (1), and an insulating layer (10) covering the memory cells and having one contact hole (2) placed in the center of the point symmetry, with the contact hole enabling electrical connection to each of the memory cells.

Abstract: Disclosed is a panel type display apparatus comprising a back plate and a transparent front plate, these plates facing each other at a small distance. A plurality of parallel strip-like cathodes are formed on the inner surface of the back plate facing the front plate and extend in a first direction. An insulating rib structure is formed on the inner surface of the back plate and has a lattice-like structure that extends along lines between adjacent cathodes in the aforementioned first direction and also along lines extending in a second direction at right angles to the first direction and defines a number of display element sections. A plurality of anodes are formed at least one portions of the rib structure extending in the aforementioned second direction. These anodes are formed on one side of portions of the rib structure extending in the second direction for the display element sections defined on the aforementioned one side.