Patents by Inventor Masahiro Iwama

Masahiro Iwama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140270631
    Abstract: A method for manufacturing an optical transmission device, includes: arranging a plurality of optical waveguides including waveguide mirrors, a transmission-side optical module and a reception-side optical module on one side of a substrate; photographing, with a photographic device, at least one waveguide mirror, and the transmission-side optical module or the reception-side optical module corresponding to the waveguide mirror, from another side of the substrate via an opening formed in the substrate; detecting optical-axis centers of the transmission-side optical module or optical-axis centers of the reception-side optical module, and central positions of reflective surfaces of the waveguide mirrors corresponding to the detected optical-axis centers, from a result of the photographing; and aligning and fixing a position relationship between the optical waveguides and the transmission-side optical module or the reception-side optical module based on a result of the detecting.
    Type: Application
    Filed: December 20, 2013
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kohei CHORAKU, Daisuke USUI, Masahiro IWAMA, Takahiro OOI, Tetsuro YAMADA
  • Publication number: 20140270656
    Abstract: An electronic device includes a board including an electronic component, a plurality of optical interface units that include an optical element which input or output light and that are provided on the board, and a plurality of individual positioning units that position a plurality of respective optical waveguides which are separate from each other at least at tip portions on a side of the optical interface units and which are optically aligned with the optical element with respect to the optical interface units independently from each other.
    Type: Application
    Filed: February 13, 2014
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kohei Choraku, Tetsuro Yamada, TAKAHIRO OOI, Masahiro Iwama, Daisuke USUI
  • Publication number: 20130234777
    Abstract: Each of a plurality of redundantly formed semiconductor circuits integrally has a monitor transistor and is energized by being supplied with an enable signal. A monitor circuit associated with each semiconductor circuit detects a collector current of the monitor transistor and, when the collector current is less than a predetermined threshold value, outputs an alarm signal. A variation predicting circuit calculates the rate of change per unit time with respect to the collector current. An order determining circuit stores the identification numbers of the semiconductor circuits into an order determination register in descending order of the rate of change. The order determination register initially outputs the front identification number, and thereafter outputs the respective following identification number each time a respective one of the monitor circuits outputs an alarm signal.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 12, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Masahiro Iwama
  • Publication number: 20080046560
    Abstract: There is provided an exchange, an exchange control program, and an exchange control method capable of securing a communication channel when lines are crossed. An exchange is connected between a terminal and a network. The exchange comprises: a monitor section that monitors a state of the network; and a channel control section that secures, before transmission from the terminal on a call-out side, a channel for use in the transmission from the call-out side terminal when determining that the network state meets a predetermined line condition based on the monitor result of the monitor section and receiving a channel securing instruction from the call-out side terminal.
    Type: Application
    Filed: December 12, 2006
    Publication date: February 21, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Katsumi Takada, Masaki Nirasawa, Kazuhiro Kaneko, Masahiro Iwama, Hirokazu Fukui
  • Patent number: 5291429
    Abstract: A circuit for a matrix calculation of the discrete cosine transformation includes a read only memory, multipliers, summing devices, registers, selectors and a control unit. The multiplication and the summing calculations, with regard to one input data, are successively carried out by using a plurality of transformation coefficients of discrete cosine transformation read from the read only memory, row elements of the matrix of discrete cosine transformation are obtained by carrying out, a number of times equal to the number of row elements, the processes successively updating the registers based on the result of the calculations, and all the row and column elements of the matrix of discrete cosine transformation are obtained by carrying out, a number of times equal to the number of column elements, the calculations.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: March 1, 1994
    Assignee: Fujitsu Limited
    Inventors: Masahiro Iwama, Osamu Kawai